powerpc fixes for 5.3 #2
An assortment of non-regression fixes that have accumulated since the start of the merge window. A fix for a user triggerable oops on machines where transactional memory is disabled, eg. Power9 bare metal, Power8 with TM disabled on the command line, or all Power7 or earlier machines. Three fixes for handling of PMU and power saving registers when running nested KVM on Power9. Two fixes for bugs found while stress testing the XIVE interrupt controller code, also on Power9. A fix to allow guests to boot under Qemu/KVM on Power9 using the the Hash MMU with >= 1TB of memory. Two fixes for bugs in the recent DMA cleanup, one of which could lead to checkstops. And finally three fixes for the PAPR SCM nvdimm driver. Thanks to: Alexey Kardashevskiy, Andrea Arcangeli, Cédric Le Goater, Christoph Hellwig, David Gibson, Gautham R. Shenoy, Michael Neuling, Oliver O'Halloran,, Satheesh Rajendran, Shawn Anastasio, Suraj Jitindar Singh, Vaibhav Jain. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJdOF2iAAoJEFHr6jzI4aWAVmsQAJ//UY1a+lz39y/5jmkybJbH HVnja6ZhsKd3+ZAnljGmqr1zuwDmy8+X3pT+1832zBBm4Z1cNKj1c0wuK5fuhAfq o0XkO0N9GFcQu8HUPb5wSBOoyXwK0qUhExfCVobl7YsDAyAI2//nSQTwxNX3W4Hv P7hz48pBbiqRzQAOSHV8ZlcOBETbSVAXeNalSXrXqSJmXQbVWCQcd6vucMSwZ7S5 ZiiL/gCBoO0kd0ZQRsGXCbwcjcR4NlTDN0M40og8Y9KTDkId8HdmJyXW3tMcZo/g W3LeMR94bUh/KrK88lMBrRXKUlxL+loZKWZaeNlA5+ShCYk/ZafkKri/QUX/glOq ahm8uqokdZ5VS1tgSYoJIKdA5qMGvv8V+CpHRJnZqaEhUCduQa5XmWPnDnEKkDt0 94VBsk0D2vHYKyygv5JMgYHQVlU7XrQF8fw2pKShpqLMY7ZMpeDDmKN9AuzxhawF 9b7HigbwNt5LvNJ0xn097KW+svCK7i3ZgiQe83W36wjSl2ystgjJ3T7yrH6Q1rKH o4loEGA4gASTDjTmWQM20lHT1xQHY4fQBC/wi/67as3m0TDeGXYI0fOZC5qtEBFr Ln/0e78VMhut/RWicDlRveszef1MCi1warR9R4I/bQ8M6O1BzHYsQ9zr6H111uxL vQ92Yp8G2PoqN7wlFlSG =Yc9T -----END PGP SIGNATURE----- Merge tag 'powerpc-5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: "An assortment of non-regression fixes that have accumulated since the start of the merge window. - A fix for a user triggerable oops on machines where transactional memory is disabled, eg. Power9 bare metal, Power8 with TM disabled on the command line, or all Power7 or earlier machines. - Three fixes for handling of PMU and power saving registers when running nested KVM on Power9. - Two fixes for bugs found while stress testing the XIVE interrupt controller code, also on Power9. - A fix to allow guests to boot under Qemu/KVM on Power9 using the the Hash MMU with >= 1TB of memory. - Two fixes for bugs in the recent DMA cleanup, one of which could lead to checkstops. - And finally three fixes for the PAPR SCM nvdimm driver. Thanks to: Alexey Kardashevskiy, Andrea Arcangeli, Cédric Le Goater, Christoph Hellwig, David Gibson, Gautham R. Shenoy, Michael Neuling, Oliver O'Halloran, Satheesh Rajendran, Shawn Anastasio, Suraj Jitindar Singh, Vaibhav Jain" * tag 'powerpc-5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/papr_scm: Force a scm-unbind if initial scm-bind fails powerpc/papr_scm: Update drc_pmem_unbind() to use H_SCM_UNBIND_ALL powerpc/pseries: Update SCM hcall op-codes in hvcall.h powerpc/tm: Fix oops on sigreturn on systems without TM powerpc/dma: Fix invalid DMA mmap behavior KVM: PPC: Book3S HV: XIVE: fix rollback when kvmppc_xive_create fails powerpc/xive: Fix loop exit-condition in xive_find_target_in_mask() powerpc: fix off by one in max_zone_pfn initialization for ZONE_DMA KVM: PPC: Book3S HV: Save and restore guest visible PSSCR bits on pseries powerpc/pmu: Set pmcregs_in_use in paca when running as LPAR KVM: PPC: Book3S HV: Always save guest pmu for guest capable of nesting powerpc/mm: Limit rma_size to 1TB when running without HV mode
This commit is contained in:
commit
bed38c3e2d
@ -121,6 +121,7 @@ config PPC
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select ARCH_32BIT_OFF_T if PPC32
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select ARCH_HAS_DEBUG_VIRTUAL
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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select ARCH_HAS_DMA_MMAP_PGPROT
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select ARCH_HAS_ELF_RANDOMIZE
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select ARCH_HAS_FORTIFY_SOURCE
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select ARCH_HAS_GCOV_PROFILE_ALL
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@ -302,9 +302,14 @@
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#define H_SCM_UNBIND_MEM 0x3F0
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#define H_SCM_QUERY_BLOCK_MEM_BINDING 0x3F4
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#define H_SCM_QUERY_LOGICAL_MEM_BINDING 0x3F8
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#define H_SCM_MEM_QUERY 0x3FC
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#define H_SCM_BLOCK_CLEAR 0x400
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#define MAX_HCALL_OPCODE H_SCM_BLOCK_CLEAR
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#define H_SCM_UNBIND_ALL 0x3FC
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#define H_SCM_HEALTH 0x400
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#define H_SCM_PERFORMANCE_STATS 0x418
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#define MAX_HCALL_OPCODE H_SCM_PERFORMANCE_STATS
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/* Scope args for H_SCM_UNBIND_ALL */
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#define H_UNBIND_SCOPE_ALL (0x1)
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#define H_UNBIND_SCOPE_DRC (0x2)
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/* H_VIOCTL functions */
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#define H_GET_VIOA_DUMP_SIZE 0x01
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@ -26,12 +26,11 @@ static inline void ppc_set_pmu_inuse(int inuse)
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if (firmware_has_feature(FW_FEATURE_LPAR)) {
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#ifdef CONFIG_PPC_PSERIES
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get_lppaca()->pmcregs_in_use = inuse;
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#endif
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} else {
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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get_paca()->pmcregs_in_use = inuse;
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#endif
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}
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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get_paca()->pmcregs_in_use = inuse;
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#endif
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#endif
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}
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@ -49,7 +49,8 @@ obj-y := cputable.o ptrace.o syscalls.o \
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signal.o sysfs.o cacheinfo.o time.o \
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prom.o traps.o setup-common.o \
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udbg.o misc.o io.o misc_$(BITS).o \
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of_platform.o prom_parse.o
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of_platform.o prom_parse.o \
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dma-common.o
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obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \
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signal_64.o ptrace32.o \
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paca.o nvram_64.o firmware.o
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17
arch/powerpc/kernel/dma-common.c
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17
arch/powerpc/kernel/dma-common.c
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@ -0,0 +1,17 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Contains common dma routines for all powerpc platforms.
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*
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* Copyright (C) 2019 Shawn Anastasio.
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*/
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#include <linux/mm.h>
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#include <linux/dma-noncoherent.h>
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pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot,
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unsigned long attrs)
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{
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if (!dev_is_dma_coherent(dev))
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return pgprot_noncached(prot);
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return prot;
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}
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@ -1198,6 +1198,9 @@ SYSCALL_DEFINE0(rt_sigreturn)
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goto bad;
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if (MSR_TM_ACTIVE(msr_hi<<32)) {
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/* Trying to start TM on non TM system */
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if (!cpu_has_feature(CPU_FTR_TM))
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goto bad;
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/* We only recheckpoint on return if we're
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* transaction.
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*/
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@ -771,6 +771,11 @@ SYSCALL_DEFINE0(rt_sigreturn)
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if (MSR_TM_ACTIVE(msr)) {
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/* We recheckpoint on return. */
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struct ucontext __user *uc_transact;
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/* Trying to start TM on non TM system */
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if (!cpu_has_feature(CPU_FTR_TM))
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goto badframe;
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if (__get_user(uc_transact, &uc->uc_link))
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goto badframe;
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if (restore_tm_sigcontexts(current, &uc->uc_mcontext,
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@ -3569,9 +3569,18 @@ int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
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mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb());
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if (kvmhv_on_pseries()) {
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/*
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* We need to save and restore the guest visible part of the
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* psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor
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* doesn't do this for us. Note only required if pseries since
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* this is done in kvmhv_load_hv_regs_and_go() below otherwise.
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*/
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unsigned long host_psscr;
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/* call our hypervisor to load up HV regs and go */
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struct hv_guest_state hvregs;
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host_psscr = mfspr(SPRN_PSSCR_PR);
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mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr);
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kvmhv_save_hv_regs(vcpu, &hvregs);
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hvregs.lpcr = lpcr;
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vcpu->arch.regs.msr = vcpu->arch.shregs.msr;
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@ -3590,6 +3599,8 @@ int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
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vcpu->arch.shregs.msr = vcpu->arch.regs.msr;
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vcpu->arch.shregs.dar = mfspr(SPRN_DAR);
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vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR);
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vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR);
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mtspr(SPRN_PSSCR_PR, host_psscr);
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/* H_CEDE has to be handled now, not later */
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if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested &&
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@ -3654,6 +3665,8 @@ int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
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vcpu->arch.vpa.dirty = 1;
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save_pmu = lp->pmcregs_in_use;
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}
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/* Must save pmu if this guest is capable of running nested guests */
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save_pmu |= nesting_enabled(vcpu->kvm);
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kvmhv_save_guest_pmu(vcpu, save_pmu);
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@ -1986,10 +1986,8 @@ static int kvmppc_xive_create(struct kvm_device *dev, u32 type)
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xive->single_escalation = xive_native_has_single_escalation();
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if (ret) {
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kfree(xive);
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if (ret)
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return ret;
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}
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return 0;
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}
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@ -1090,9 +1090,9 @@ static int kvmppc_xive_native_create(struct kvm_device *dev, u32 type)
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xive->ops = &kvmppc_xive_native_ops;
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if (ret)
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kfree(xive);
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return ret;
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return ret;
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return 0;
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}
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/*
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@ -1899,11 +1899,20 @@ void hash__setup_initial_memory_limit(phys_addr_t first_memblock_base,
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*
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* For guests on platforms before POWER9, we clamp the it limit to 1G
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* to avoid some funky things such as RTAS bugs etc...
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*
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* On POWER9 we limit to 1TB in case the host erroneously told us that
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* the RMA was >1TB. Effective address bits 0:23 are treated as zero
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* (meaning the access is aliased to zero i.e. addr = addr % 1TB)
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* for virtual real mode addressing and so it doesn't make sense to
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* have an area larger than 1TB as it can't be addressed.
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*/
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if (!early_cpu_has_feature(CPU_FTR_HVMODE)) {
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ppc64_rma_size = first_memblock_size;
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if (!early_cpu_has_feature(CPU_FTR_ARCH_300))
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ppc64_rma_size = min_t(u64, ppc64_rma_size, 0x40000000);
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else
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ppc64_rma_size = min_t(u64, ppc64_rma_size,
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1UL << SID_SHIFT_1T);
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/* Finally limit subsequent allocations */
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memblock_set_current_limit(ppc64_rma_size);
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@ -239,7 +239,7 @@ void __init paging_init(void)
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#ifdef CONFIG_ZONE_DMA
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max_zone_pfns[ZONE_DMA] = min(max_low_pfn,
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((1UL << ARCH_ZONE_DMA_BITS) - 1) >> PAGE_SHIFT);
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1UL << (ARCH_ZONE_DMA_BITS - PAGE_SHIFT));
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#endif
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max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
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#ifdef CONFIG_HIGHMEM
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@ -11,6 +11,7 @@
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#include <linux/sched.h>
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#include <linux/libnvdimm.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <asm/plpar_wrappers.h>
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@ -43,8 +44,9 @@ struct papr_scm_priv {
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static int drc_pmem_bind(struct papr_scm_priv *p)
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{
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unsigned long ret[PLPAR_HCALL_BUFSIZE];
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uint64_t rc, token;
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uint64_t saved = 0;
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uint64_t token;
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int64_t rc;
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/*
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* When the hypervisor cannot map all the requested memory in a single
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@ -64,6 +66,10 @@ static int drc_pmem_bind(struct papr_scm_priv *p)
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} while (rc == H_BUSY);
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if (rc) {
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/* H_OVERLAP needs a separate error path */
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if (rc == H_OVERLAP)
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return -EBUSY;
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dev_err(&p->pdev->dev, "bind err: %lld\n", rc);
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return -ENXIO;
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}
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@ -78,22 +84,36 @@ static int drc_pmem_bind(struct papr_scm_priv *p)
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static int drc_pmem_unbind(struct papr_scm_priv *p)
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{
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unsigned long ret[PLPAR_HCALL_BUFSIZE];
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uint64_t rc, token;
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uint64_t token = 0;
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int64_t rc;
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token = 0;
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dev_dbg(&p->pdev->dev, "unbind drc %x\n", p->drc_index);
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/* NB: unbind has the same retry requirements mentioned above */
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/* NB: unbind has the same retry requirements as drc_pmem_bind() */
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do {
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rc = plpar_hcall(H_SCM_UNBIND_MEM, ret, p->drc_index,
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p->bound_addr, p->blocks, token);
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/* Unbind of all SCM resources associated with drcIndex */
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rc = plpar_hcall(H_SCM_UNBIND_ALL, ret, H_UNBIND_SCOPE_DRC,
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p->drc_index, token);
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token = ret[0];
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cond_resched();
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/* Check if we are stalled for some time */
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if (H_IS_LONG_BUSY(rc)) {
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msleep(get_longbusy_msecs(rc));
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rc = H_BUSY;
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} else if (rc == H_BUSY) {
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cond_resched();
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}
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} while (rc == H_BUSY);
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if (rc)
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dev_err(&p->pdev->dev, "unbind error: %lld\n", rc);
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else
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dev_dbg(&p->pdev->dev, "unbind drc %x complete\n",
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p->drc_index);
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return !!rc;
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return rc == H_SUCCESS ? 0 : -ENXIO;
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}
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static int papr_scm_meta_get(struct papr_scm_priv *p,
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@ -389,6 +409,14 @@ static int papr_scm_probe(struct platform_device *pdev)
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/* request the hypervisor to bind this region to somewhere in memory */
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rc = drc_pmem_bind(p);
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/* If phyp says drc memory still bound then force unbound and retry */
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if (rc == -EBUSY) {
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dev_warn(&pdev->dev, "Retrying bind after unbinding\n");
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drc_pmem_unbind(p);
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rc = drc_pmem_bind(p);
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}
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if (rc)
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goto err;
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@ -479,7 +479,7 @@ static int xive_find_target_in_mask(const struct cpumask *mask,
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* Now go through the entire mask until we find a valid
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* target.
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*/
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for (;;) {
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do {
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/*
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* We re-check online as the fallback case passes us
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* an untested affinity mask
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@ -487,12 +487,11 @@ static int xive_find_target_in_mask(const struct cpumask *mask,
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if (cpu_online(cpu) && xive_try_pick_target(cpu))
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return cpu;
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cpu = cpumask_next(cpu, mask);
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if (cpu == first)
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break;
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/* Wrap around */
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if (cpu >= nr_cpu_ids)
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cpu = cpumask_first(mask);
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}
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} while (cpu != first);
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return -1;
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}
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