drm/ast: Fix long time waiting on s3/s4 resume
In resume, DP's launch function, ast_dp_launch, could wait at most 30 seconds before timeout to check if DP is enabled. It could lead to 'DPM device timeout' and trigger unrecoverable kernel panic. To avoid this problem, we check if DP enable or not at driver probe only. Reported-and-tested-by: Wendy Wang <wendy.wang@intel.com> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217278 Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20230530041240.13427-1-jammy_huang@aspeedtech.com
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@ -119,53 +119,32 @@ err_astdp_edid_not_ready:
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/*
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* Launch Aspeed DP
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*/
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void ast_dp_launch(struct drm_device *dev, u8 bPower)
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void ast_dp_launch(struct drm_device *dev)
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{
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u32 i = 0, j = 0, WaitCount = 1;
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u8 bDPTX = 0;
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u32 i = 0;
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u8 bDPExecute = 1;
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struct ast_device *ast = to_ast_device(dev);
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// S3 come back, need more time to wait BMC ready.
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if (bPower)
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WaitCount = 300;
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// Wait total count by different condition.
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for (j = 0; j < WaitCount; j++) {
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bDPTX = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, TX_TYPE_MASK);
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if (bDPTX)
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break;
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// Wait one second then timeout.
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while (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, ASTDP_MCU_FW_EXECUTING) !=
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ASTDP_MCU_FW_EXECUTING) {
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i++;
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// wait 100 ms
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msleep(100);
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}
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// 0xE : ASTDP with DPMCU FW handling
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if (bDPTX == ASTDP_DPMCU_TX) {
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// Wait one second then timeout.
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i = 0;
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while (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, COPROCESSOR_LAUNCH) !=
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COPROCESSOR_LAUNCH) {
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i++;
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// wait 100 ms
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msleep(100);
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if (i >= 10) {
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// DP would not be ready.
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bDPExecute = 0;
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break;
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}
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if (i >= 10) {
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// DP would not be ready.
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bDPExecute = 0;
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break;
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}
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if (bDPExecute)
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ast->tx_chip_types |= BIT(AST_TX_ASTDP);
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ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xE5,
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(u8) ~ASTDP_HOST_EDID_READ_DONE_MASK,
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ASTDP_HOST_EDID_READ_DONE);
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}
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if (!bDPExecute)
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drm_err(dev, "Wait DPMCU executing timeout\n");
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ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xE5,
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(u8) ~ASTDP_HOST_EDID_READ_DONE_MASK,
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ASTDP_HOST_EDID_READ_DONE);
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}
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@ -350,9 +350,6 @@ int ast_mode_config_init(struct ast_device *ast);
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#define AST_DP501_LINKRATE 0xf014
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#define AST_DP501_EDID_DATA 0xf020
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/* Define for Soc scratched reg */
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#define COPROCESSOR_LAUNCH BIT(5)
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/*
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* Display Transmitter Type:
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*/
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@ -480,7 +477,7 @@ struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
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/* aspeed DP */
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int ast_astdp_read_edid(struct drm_device *dev, u8 *ediddata);
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void ast_dp_launch(struct drm_device *dev, u8 bPower);
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void ast_dp_launch(struct drm_device *dev);
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void ast_dp_power_on_off(struct drm_device *dev, bool no);
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void ast_dp_set_on_off(struct drm_device *dev, bool no);
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void ast_dp_set_mode(struct drm_crtc *crtc, struct ast_vbios_mode_info *vbios_mode);
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@ -254,8 +254,13 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
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case 0x0c:
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ast->tx_chip_types = AST_TX_DP501_BIT;
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}
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} else if (ast->chip == AST2600)
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ast_dp_launch(&ast->base, 0);
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} else if (ast->chip == AST2600) {
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if (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, TX_TYPE_MASK) ==
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ASTDP_DPMCU_TX) {
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ast->tx_chip_types = AST_TX_ASTDP_BIT;
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ast_dp_launch(&ast->base);
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}
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}
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/* Print stuff for diagnostic purposes */
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if (ast->tx_chip_types & AST_TX_NONE_BIT)
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@ -264,6 +269,8 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
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drm_info(dev, "Using Sil164 TMDS transmitter\n");
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if (ast->tx_chip_types & AST_TX_DP501_BIT)
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drm_info(dev, "Using DP501 DisplayPort transmitter\n");
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if (ast->tx_chip_types & AST_TX_ASTDP_BIT)
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drm_info(dev, "Using ASPEED DisplayPort transmitter\n");
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return 0;
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}
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@ -380,7 +380,8 @@ void ast_post_gpu(struct drm_device *dev)
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ast_set_def_ext_reg(dev);
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if (ast->chip == AST2600) {
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ast_dp_launch(dev, 1);
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if (ast->tx_chip_types & AST_TX_ASTDP_BIT)
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ast_dp_launch(dev);
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} else if (ast->config_mode == ast_use_p2a) {
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if (ast->chip == AST2500)
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ast_post_chip_2500(dev);
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