arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes
Add device tree nodes for two i2c blocks: i2c13 and i2c14. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-12-vkoul@kernel.org
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@ -582,6 +582,44 @@
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};
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};
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qupv3_id_1: geniqup@ac0000 {
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compatible = "qcom,geni-se-qup";
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reg = <0x0 0x00ac0000 0x0 0x6000>;
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clock-names = "m-ahb", "s-ahb";
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clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
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<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "disabled";
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i2c13: i2c@a94000 {
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compatible = "qcom,geni-i2c";
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reg = <0 0x00a94000 0 0x4000>;
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clock-names = "se";
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clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
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pinctrl-names = "default";
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pinctrl-0 = <&qup_i2c13_data_clk>;
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interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c14: i2c@a98000 {
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compatible = "qcom,geni-i2c";
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reg = <0 0x00a98000 0 0x4000>;
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clock-names = "se";
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clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
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pinctrl-names = "default";
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pinctrl-0 = <&qup_i2c14_data_clk>;
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interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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tcsr_mutex: hwlock@1f40000 {
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compatible = "qcom,tcsr-mutex";
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reg = <0x0 0x01f40000 0x0 0x40000>;
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@ -609,6 +647,20 @@
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gpio-ranges = <&tlmm 0 0 211>;
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wakeup-parent = <&pdc>;
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qup_i2c13_data_clk: qup-i2c13-data-clk {
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pins = "gpio48", "gpio49";
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function = "qup13";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_i2c14_data_clk: qup-i2c14-data-clk {
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pins = "gpio52", "gpio53";
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function = "qup14";
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drive-strength = <2>;
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bias-pull-up;
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};
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qup_uart7_rx: qup-uart7-rx {
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pins = "gpio26";
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function = "qup7";
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