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net: dsa: mv88e6xxx: use generic clause 45 definitions

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The private MV88E6390_PCS_CONTROL_1 definitions in serdes.h reflects
the IEEE 802.3 standard PCS control register 1 definitions, only
offset by 0x1000 in the PHYXS register space.  Rather than inventing
our own, use those that already exist, and name the register
MV88E6390_10G_CTRL1.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Russell King 2020-04-30 09:21:34 +01:00 committed by David S. Miller
parent bf2320a60e
commit bf604bc90b
2 changed files with 7 additions and 11 deletions
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12
drivers/net/dsa/mv88e6xxx/serdes.c
View File

@ -534,21 +534,21 @@ static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, u8 lane,
int err;
err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
MV88E6390_PCS_CONTROL_1, &val);
MV88E6390_10G_CTRL1, &val);
if (err)
return err;
if (up)
new_val = val & ~(MV88E6390_PCS_CONTROL_1_RESET |
MV88E6390_PCS_CONTROL_1_LOOPBACK |
MV88E6390_PCS_CONTROL_1_PDOWN);
new_val = val & ~(MDIO_CTRL1_RESET |
MDIO_PCS_CTRL1_LOOPBACK |
MDIO_CTRL1_LPOWER);
else
new_val = val | MV88E6390_PCS_CONTROL_1_PDOWN;
new_val = val | MDIO_CTRL1_LPOWER;
if (val != new_val)
err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
MV88E6390_PCS_CONTROL_1, new_val);
MV88E6390_10G_CTRL1, new_val);
return err;
}

6
drivers/net/dsa/mv88e6xxx/serdes.h
View File

@ -40,11 +40,7 @@
#define MV88E6390_PORT10_LANE3 0x17
/* 10GBASE-R and 10GBASE-X4/X2 */
#define MV88E6390_PCS_CONTROL_1 0x1000
#define MV88E6390_PCS_CONTROL_1_RESET BIT(15)
#define MV88E6390_PCS_CONTROL_1_LOOPBACK BIT(14)
#define MV88E6390_PCS_CONTROL_1_SPEED BIT(13)
#define MV88E6390_PCS_CONTROL_1_PDOWN BIT(11)
#define MV88E6390_10G_CTRL1 (0x1000 + MDIO_CTRL1)
/* 1000BASE-X and SGMII */
#define MV88E6390_SGMII_BMCR (0x2000 + MII_BMCR)