drm/i915: Show support for accurate sw PMU busyness tracking
Expose whether or not we support the PMU software tracking in our scheduler capabilities, so userspace can query at runtime. v2: Use I915_SCHEDULER_CAP_ENGINE_BUSY_STATS for a less ambiguous capability name. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190703143702.11339-1-chris@chris-wilson.co.uk
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@ -688,9 +688,10 @@ void intel_engines_set_scheduler_caps(struct drm_i915_private *i915)
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u8 engine;
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u8 engine;
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u8 sched;
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u8 sched;
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} map[] = {
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} map[] = {
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#define MAP(x, y) { ilog2(I915_ENGINE_HAS_##x), ilog2(I915_SCHEDULER_CAP_##y) }
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#define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) }
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MAP(PREEMPTION, PREEMPTION),
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MAP(HAS_PREEMPTION, PREEMPTION),
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MAP(SEMAPHORES, SEMAPHORES),
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MAP(HAS_SEMAPHORES, SEMAPHORES),
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MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS),
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#undef MAP
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#undef MAP
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};
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};
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struct intel_engine_cs *engine;
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struct intel_engine_cs *engine;
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@ -102,10 +102,8 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
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/*
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/*
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* Also there is software busyness tracking available we do not
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* Also there is software busyness tracking available we do not
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* need the timer for I915_SAMPLE_BUSY counter.
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* need the timer for I915_SAMPLE_BUSY counter.
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*
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* Use RCS as proxy for all engines.
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*/
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*/
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else if (intel_engine_supports_stats(i915->engine[RCS0]))
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else if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS)
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enable &= ~BIT(I915_SAMPLE_BUSY);
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enable &= ~BIT(I915_SAMPLE_BUSY);
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/*
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/*
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@ -521,6 +521,7 @@ typedef struct drm_i915_irq_wait {
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#define I915_SCHEDULER_CAP_PRIORITY (1ul << 1)
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#define I915_SCHEDULER_CAP_PRIORITY (1ul << 1)
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#define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2)
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#define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2)
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#define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3)
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#define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3)
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#define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4)
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#define I915_PARAM_HUC_STATUS 42
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#define I915_PARAM_HUC_STATUS 42
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