dt-bindings: PCI: qcom,pcie-sc8280xp: Move SC8280XP to dedicated schema
Move SC8280XP compatible PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing easier. This creates equivalent schema file, except missing required compatible which is actually redundant. Link: https://lore.kernel.org/linux-pci/20240126-dt-bindings-pci-qcom-split-v3-6-f23cda4d74c0@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit is contained in:
Krzysztof Kozlowski
Krzysztof Wilczyński
parent
2278b8b547
commit
c007a55055
180
Documentation/devicetree/bindings/pci/qcom,pcie-sc8280xp.yaml
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180
Documentation/devicetree/bindings/pci/qcom,pcie-sc8280xp.yaml
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@ -0,0 +1,180 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/qcom,pcie-sc8280xp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SC8280XP PCI Express Root Complex
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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description:
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Qualcomm SC8280XP SoC PCIe root complex controller is based on the Synopsys
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DesignWare PCIe IP.
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properties:
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compatible:
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enum:
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- qcom,pcie-sa8540p
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- qcom,pcie-sc8280xp
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reg:
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minItems: 5
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maxItems: 6
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reg-names:
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minItems: 5
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items:
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- const: parf # Qualcomm specific registers
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- const: dbi # DesignWare PCIe registers
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- const: elbi # External local bus interface registers
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- const: atu # ATU address space
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- const: config # PCIe configuration space
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- const: mhi # MHI registers
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clocks:
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minItems: 8
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maxItems: 9
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clock-names:
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minItems: 8
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items:
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- const: aux # Auxiliary clock
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- const: cfg # Configuration clock
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- const: bus_master # Master AXI clock
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- const: bus_slave # Slave AXI clock
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- const: slave_q2a # Slave Q2A clock
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- const: ddrss_sf_tbu # PCIe SF TBU clock
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- const: noc_aggr_4 # NoC aggregate 4 clock
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- const: noc_aggr_south_sf # NoC aggregate South SF clock
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- const: cnoc_qx # Configuration NoC QX clock
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: pci
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vddpe-3v3-supply:
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description: A phandle to the PCIe endpoint power supply
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required:
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- interconnects
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- interconnect-names
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allOf:
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- $ref: qcom,pcie-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,pcie-sc8280xp
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then:
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properties:
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interrupts:
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minItems: 4
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maxItems: 4
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interrupt-names:
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items:
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- const: msi0
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- const: msi1
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- const: msi2
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- const: msi3
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else:
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properties:
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interrupts:
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maxItems: 1
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interrupt-names:
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items:
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- const: msi
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interconnect/qcom,sc8280xp.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie@1c20000 {
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compatible = "qcom,pcie-sc8280xp";
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reg = <0x0 0x01c20000 0x0 0x3000>,
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<0x0 0x3c000000 0x0 0xf1d>,
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<0x0 0x3c000f20 0x0 0xa8>,
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<0x0 0x3c001000 0x0 0x1000>,
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<0x0 0x3c100000 0x0 0x100000>,
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<0x0 0x01c23000 0x0 0x1000>;
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reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
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ranges = <0x01000000 0x0 0x00000000 0x0 0x3c200000 0x0 0x100000>,
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<0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>;
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bus-range = <0x00 0xff>;
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device_type = "pci";
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linux,pci-domain = <2>;
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num-lanes = <4>;
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#address-cells = <3>;
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#size-cells = <2>;
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assigned-clocks = <&gcc GCC_PCIE_2A_AUX_CLK>;
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assigned-clock-rates = <19200000>;
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clocks = <&gcc GCC_PCIE_2A_AUX_CLK>,
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<&gcc GCC_PCIE_2A_CFG_AHB_CLK>,
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<&gcc GCC_PCIE_2A_MSTR_AXI_CLK>,
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<&gcc GCC_PCIE_2A_SLV_AXI_CLK>,
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<&gcc GCC_PCIE_2A_SLV_Q2A_AXI_CLK>,
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<&gcc GCC_DDRSS_PCIE_SF_TBU_CLK>,
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<&gcc GCC_AGGRE_NOC_PCIE_4_AXI_CLK>,
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<&gcc GCC_AGGRE_NOC_PCIE_SOUTH_SF_AXI_CLK>;
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clock-names = "aux",
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"cfg",
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"bus_master",
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"bus_slave",
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"slave_q2a",
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"ddrss_sf_tbu",
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"noc_aggr_4",
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"noc_aggr_south_sf";
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dma-coherent;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 525 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi0", "msi1", "msi2", "msi3";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 2 &intc 0 0 GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 3 &intc 0 0 GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 0 4 &intc 0 0 GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>;
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interconnects = <&aggre2_noc MASTER_PCIE_2A 0 &mc_virt SLAVE_EBI1 0>,
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<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_2A 0>;
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interconnect-names = "pcie-mem", "cpu-pcie";
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phys = <&pcie2a_phy>;
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phy-names = "pciephy";
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pinctrl-0 = <&pcie2a_default>;
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pinctrl-names = "default";
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power-domains = <&gcc PCIE_2A_GDSC>;
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resets = <&gcc GCC_PCIE_2A_BCR>;
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reset-names = "pci";
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perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
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wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
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vddpe-3v3-supply = <&vreg_nvme>;
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};
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};
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@ -28,11 +28,9 @@ properties:
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- qcom,pcie-ipq8074-gen3
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- qcom,pcie-msm8996
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- qcom,pcie-qcs404
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- qcom,pcie-sa8540p
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- qcom,pcie-sa8775p
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- qcom,pcie-sc7280
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- qcom,pcie-sc8180x
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- qcom,pcie-sc8280xp
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- qcom,pcie-sdm845
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- qcom,pcie-sdx55
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- items:
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@ -210,7 +208,6 @@ allOf:
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- qcom,pcie-sa8775p
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- qcom,pcie-sc7280
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- qcom,pcie-sc8180x
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- qcom,pcie-sc8280xp
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- qcom,pcie-sdx55
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then:
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properties:
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@ -538,36 +535,6 @@ allOf:
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items:
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- const: pci # PCIe core reset
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,pcie-sa8540p
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- qcom,pcie-sc8280xp
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then:
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properties:
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clocks:
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minItems: 8
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maxItems: 9
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clock-names:
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minItems: 8
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items:
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- const: aux # Auxiliary clock
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- const: cfg # Configuration clock
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- const: bus_master # Master AXI clock
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- const: bus_slave # Slave AXI clock
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- const: slave_q2a # Slave Q2A clock
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- const: ddrss_sf_tbu # PCIe SF TBU clock
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- const: noc_aggr_4 # NoC aggregate 4 clock
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- const: noc_aggr_south_sf # NoC aggregate South SF clock
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- const: cnoc_qx # Configuration NoC QX clock
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: pci # PCIe core reset
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- if:
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properties:
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compatible:
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@ -623,9 +590,7 @@ allOf:
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compatible:
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contains:
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enum:
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- qcom,pcie-sa8540p
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- qcom,pcie-sa8775p
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- qcom,pcie-sc8280xp
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then:
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required:
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- interconnects
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@ -692,24 +657,6 @@ allOf:
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- const: msi6
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- const: msi7
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,pcie-sc8280xp
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then:
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properties:
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interrupts:
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minItems: 4
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maxItems: 4
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interrupt-names:
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items:
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- const: msi0
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- const: msi1
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- const: msi2
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- const: msi3
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- if:
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properties:
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compatible:
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@ -724,7 +671,6 @@ allOf:
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- qcom,pcie-ipq8074
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- qcom,pcie-ipq8074-gen3
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- qcom,pcie-qcs404
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- qcom,pcie-sa8540p
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then:
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properties:
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interrupts:
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