powerpc: fix fsl_upm nand driver modular build
The fsl_upm nand driver fails to build because fsl_lbc_lock isn't exported, the lock is needed by the inlined fsl_upm_run_pattern() function: ERROR: "fsl_lbc_lock" [drivers/mtd/nand/fsl_upm.ko] undefined! Dave Jones purposed to export the lock, but it is better to just uninline the fsl_upm_run_pattern(). When uninlined we also no longer need the exported fsl_lbc_regs, and both fsl_lbc_lock and fsl_lbc_regs could be marked static. While at it, also add some missing includes that we should have included explicitly. Reported-by: Dave Jones <davej@redhat.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -23,9 +23,9 @@
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#ifndef __ASM_FSL_LBC_H
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#define __ASM_FSL_LBC_H
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#include <asm/io.h>
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#include <linux/io.h>
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struct fsl_lbc_bank {
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__be32 br; /**< Base Register */
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@ -227,9 +227,6 @@ struct fsl_lbc_regs {
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u8 res8[0xF00];
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};
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extern struct fsl_lbc_regs __iomem *fsl_lbc_regs;
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extern spinlock_t fsl_lbc_lock;
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/*
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* FSL UPM routines
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*/
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@ -268,44 +265,7 @@ static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
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cpu_relax();
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}
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/**
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* fsl_upm_run_pattern - actually run an UPM pattern
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* @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
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* @io_base: remapped pointer to where memory access should happen
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* @mar: MAR register content during pattern execution
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*
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* This function triggers dummy write to the memory specified by the io_base,
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* thus UPM pattern actually executed. Note that mar usage depends on the
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* pre-programmed AMX bits in the UPM RAM.
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*/
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static inline int fsl_upm_run_pattern(struct fsl_upm *upm,
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void __iomem *io_base, u32 mar)
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{
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int ret = 0;
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unsigned long flags;
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spin_lock_irqsave(&fsl_lbc_lock, flags);
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out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
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switch (upm->width) {
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case 8:
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out_8(io_base, 0x0);
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break;
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case 16:
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out_be16(io_base, 0x0);
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break;
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case 32:
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out_be32(io_base, 0x0);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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spin_unlock_irqrestore(&fsl_lbc_lock, flags);
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return ret;
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}
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extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base,
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u32 mar);
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#endif /* __ASM_FSL_LBC_H */
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@ -11,14 +11,19 @@
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* (at your option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/compiler.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <asm/prom.h>
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#include <asm/fsl_lbc.h>
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spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock);
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struct fsl_lbc_regs __iomem *fsl_lbc_regs;
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EXPORT_SYMBOL(fsl_lbc_regs);
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static spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock);
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static struct fsl_lbc_regs __iomem *fsl_lbc_regs;
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static char __initdata *compat_lbc[] = {
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"fsl,pq2-localbus",
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@ -127,3 +132,43 @@ int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm)
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return 0;
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}
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EXPORT_SYMBOL(fsl_upm_find);
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/**
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* fsl_upm_run_pattern - actually run an UPM pattern
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* @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
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* @io_base: remapped pointer to where memory access should happen
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* @mar: MAR register content during pattern execution
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*
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* This function triggers dummy write to the memory specified by the io_base,
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* thus UPM pattern actually executed. Note that mar usage depends on the
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* pre-programmed AMX bits in the UPM RAM.
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*/
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int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar)
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{
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int ret = 0;
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unsigned long flags;
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spin_lock_irqsave(&fsl_lbc_lock, flags);
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out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
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switch (upm->width) {
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case 8:
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out_8(io_base, 0x0);
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break;
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case 16:
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out_be16(io_base, 0x0);
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break;
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case 32:
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out_be32(io_base, 0x0);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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spin_unlock_irqrestore(&fsl_lbc_lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(fsl_upm_run_pattern);
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