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riscv: mm: Fix incorrect ASID argument when flushing TLB

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commit 9a801afd3eb95e1a89aba17321062df06fb49d98 upstream.

Currently, we pass the CONTEXTID instead of the ASID to the TLB flush
function. We should only take the ASID field to prevent from touching
the reserved bit field.

Fixes: 3f1e782998cd ("riscv: add ASID-based tlbflushing methods")
Signed-off-by: Dylan Jhong <dylan@andestech.com>
Reviewed-by: Sergey Matyukevich <sergey.matyukevich@syntacore.com>
Link: https://lore.kernel.org/r/20230313034906.2401730-1-dylan@andestech.com
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Dylan Jhong 2023-03-13 11:49:06 +08:00 committed by Greg Kroah-Hartman
parent 555ec88c75
commit c100236820
3 changed files with 4 additions and 2 deletions
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2
arch/riscv/include/asm/tlbflush.h
View File

@ -12,6 +12,8 @@
#include <asm/errata_list.h>
#ifdef CONFIG_MMU
extern unsigned long asid_mask;
static inline void local_flush_tlb_all(void)
{
__asm__ __volatile__ ("sfence.vma" : : : "memory");

2
arch/riscv/mm/context.c
View File

@ -22,7 +22,7 @@ DEFINE_STATIC_KEY_FALSE(use_asid_allocator);
static unsigned long asid_bits;
static unsigned long num_asids;
static unsigned long asid_mask;
unsigned long asid_mask;
static atomic_long_t current_version;

2
arch/riscv/mm/tlbflush.c
View File

@ -43,7 +43,7 @@ static void __sbi_tlb_flush_range(struct mm_struct *mm, unsigned long start,
/* check if the tlbflush needs to be sent to other CPUs */
broadcast = cpumask_any_but(cmask, cpuid) < nr_cpu_ids;
if (static_branch_unlikely(&use_asid_allocator)) {
unsigned long asid = atomic_long_read(&mm->context.id);
unsigned long asid = atomic_long_read(&mm->context.id) & asid_mask;
if (broadcast) {
riscv_cpuid_to_hartid_mask(cmask, &hmask);