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x86: apic - unify disconnect_bsp_APIC

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- just #ifdef added

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Cyrill Gorcunov 2008-08-18 20:45:56 +04:00 committed by Ingo Molnar
parent c40aaec686
commit c177b0bc03
2 changed files with 55 additions and 34 deletions
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66
arch/x86/kernel/apic_32.c
View File

@ -1420,6 +1420,7 @@ void __init connect_bsp_APIC(void)
*/ */
void disconnect_bsp_APIC(int virt_wire_setup) void disconnect_bsp_APIC(int virt_wire_setup)
{ {
#ifdef CONFIG_X86_32
if (pic_mode) { if (pic_mode) {
/* /*
* Put the board back into PIC mode (has an effect only on * Put the board back into PIC mode (has an effect only on
@ -1431,47 +1432,48 @@ void disconnect_bsp_APIC(int virt_wire_setup)
"entering PIC mode.\n"); "entering PIC mode.\n");
outb(0x70, 0x22); outb(0x70, 0x22);
outb(0x00, 0x23); outb(0x00, 0x23);
} else { return;
/* Go back to Virtual Wire compatibility mode */ }
unsigned long value; #endif
/* For the spurious interrupt use vector F, and enable it */ /* Go back to Virtual Wire compatibility mode */
value = apic_read(APIC_SPIV); unsigned int value;
value &= ~APIC_VECTOR_MASK;
value |= APIC_SPIV_APIC_ENABLED;
value |= 0xf;
apic_write(APIC_SPIV, value);
if (!virt_wire_setup) { /* For the spurious interrupt use vector F, and enable it */
/* value = apic_read(APIC_SPIV);
* For LVT0 make it edge triggered, active high, value &= ~APIC_VECTOR_MASK;
* external and enabled value |= APIC_SPIV_APIC_ENABLED;
*/ value |= 0xf;
value = apic_read(APIC_LVT0); apic_write(APIC_SPIV, value);
value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
apic_write(APIC_LVT0, value);
} else {
/* Disable LVT0 */
apic_write(APIC_LVT0, APIC_LVT_MASKED);
}
if (!virt_wire_setup) {
/* /*
* For LVT1 make it edge triggered, active high, nmi and * For LVT0 make it edge triggered, active high,
* enabled * external and enabled
*/ */
value = apic_read(APIC_LVT1); value = apic_read(APIC_LVT0);
value &= ~( value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
APIC_MODE_MASK | APIC_SEND_PENDING |
APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR | APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED); APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING; value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI); value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
apic_write(APIC_LVT1, value); apic_write(APIC_LVT0, value);
} else {
/* Disable LVT0 */
apic_write(APIC_LVT0, APIC_LVT_MASKED);
} }
/*
* For LVT1 make it edge triggered, active high,
* nmi and enabled
*/
value = apic_read(APIC_LVT1);
value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI);
apic_write(APIC_LVT1, value);
} }
void __cpuinit generic_processor_info(int apicid, int version) void __cpuinit generic_processor_info(int apicid, int version)

23
arch/x86/kernel/apic_64.c
View File

@ -1348,8 +1348,24 @@ void __init connect_bsp_APIC(void)
*/ */
void disconnect_bsp_APIC(int virt_wire_setup) void disconnect_bsp_APIC(int virt_wire_setup)
{ {
#ifdef CONFIG_X86_32
if (pic_mode) {
/*
* Put the board back into PIC mode (has an effect only on
* certain older boards). Note that APIC interrupts, including
* IPIs, won't work beyond this point! The only exception are
* INIT IPIs.
*/
apic_printk(APIC_VERBOSE, "disabling APIC mode, "
"entering PIC mode.\n");
outb(0x70, 0x22);
outb(0x00, 0x23);
return;
}
#endif
/* Go back to Virtual Wire compatibility mode */ /* Go back to Virtual Wire compatibility mode */
unsigned long value; unsigned int value;
/* For the spurious interrupt use vector F, and enable it */ /* For the spurious interrupt use vector F, and enable it */
value = apic_read(APIC_SPIV); value = apic_read(APIC_SPIV);
@ -1375,7 +1391,10 @@ void disconnect_bsp_APIC(int virt_wire_setup)
apic_write(APIC_LVT0, APIC_LVT_MASKED); apic_write(APIC_LVT0, APIC_LVT_MASKED);
} }
/* For LVT1 make it edge triggered, active high, nmi and enabled */ /*
* For LVT1 make it edge triggered, active high,
* nmi and enabled
*/
value = apic_read(APIC_LVT1); value = apic_read(APIC_LVT1);
value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING | value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR | APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |