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selftests/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_ctl field

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Thresh control bits in the event code is used to program thresh_ctl
field in Monitor Mode Control Register A (MMCRA: 48-55). When scheduling
events as a group, all events in that group should match value in these
bits. Otherwise event open for the sibling events will fail.

Testcase uses event code PM_MRK_INST_CMPL (0x401e0) as leader and
another event PM_THRESH_MET (101ec) as sibling event, and checks if
group constraint checks for thresh_ctl field added correctly via perf
interface.

Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220610134113.62991-34-atrajeev@linux.vnet.ibm.com
This commit is contained in:
Kajol Jain 2022-06-10 19:11:11 +05:30 committed by Michael Ellerman
parent 142c9bd1ff
commit c178606ab5
2 changed files with 65 additions and 1 deletions
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2
tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
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@ -6,7 +6,7 @@ TEST_GEN_PROGS := group_constraint_pmc56_test group_pmc56_exclude_constraints_te
group_constraint_mmcra_sample_test invalid_event_code_test reserved_bits_mmcra_thresh_ctl_test \
blacklisted_events_test event_alternatives_tests_p9 event_alternatives_tests_p10 generic_events_valid_test \
group_constraint_l2l3_sel_test group_constraint_cache_test group_constraint_thresh_cmp_test \
group_constraint_unit_test
group_constraint_unit_test group_constraint_thresh_ctl_test
top_srcdir = ../../../../../..
include ../../../lib.mk

64
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c Normal file
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@ -0,0 +1,64 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright 2022, Kajol Jain, IBM Corp.
*/
#include <stdio.h>
#include <stdlib.h>
#include "../event.h"
#include "utils.h"
#include "../sampling_tests/misc.h"
/*
* Primary PMU events used here are PM_MRK_INST_CMPL (0x401e0) and
* PM_THRESH_MET (0x101ec).
* Threshold event selection used is issue to complete and issue to
* finished for cycles
* Sampling criteria is Load or Store only sampling
*/
#define EventCode_1 0x35340401e0
#define EventCode_2 0x34340101ec
#define EventCode_3 0x35340101ec
/*
* Testcase for group constraint check of thresh_ctl bits which is
* used to program thresh compare field in Monitor Mode Control Register A
* (MMCR0: 48-55).
* All events in the group should match thresh ctl bits otherwise
* event_open for the group will fail.
*/
static int group_constraint_thresh_ctl(void)
{
struct event event, leader;
/* Check for platform support for the test */
SKIP_IF(platform_check_for_tests());
/* Init the events for the group contraint thresh control test */
event_init(&leader, EventCode_1);
FAIL_IF(event_open(&leader));
event_init(&event, EventCode_2);
/* Expected to fail as sibling and leader event request different thresh_ctl bits */
FAIL_IF(!event_open_with_group(&event, leader.fd));
event_close(&event);
/* Init the event for the group contraint thresh control test */
event_init(&event, EventCode_3);
/* Expected to succeed as sibling and leader event request same thresh_ctl bits */
FAIL_IF(event_open_with_group(&event, leader.fd));
event_close(&leader);
event_close(&event);
return 0;
}
int main(void)
{
return test_harness(group_constraint_thresh_ctl, "group_constraint_thresh_ctl");
}