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drm/amd/display: Refactor edp dsc codes.

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Refactor edp dsc codes.

We split out edp dsc config from "global" to "per-panel" config settings.

Reviewed-by: Mike Hsieh <mike.hsieh@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Ian Chen <ian.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ian Chen 2022-08-04 15:44:27 +08:00 committed by Alex Deucher
parent 7857825ba4
commit c17a34e052
7 changed files with 48 additions and 8 deletions
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4
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View File

@ -1529,7 +1529,6 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
if (amdgpu_dc_debug_mask & DC_DISABLE_DSC) {
adev->dm.dc->debug.disable_dsc = true;
adev->dm.dc->debug.disable_dsc_edp = true;
}
if (amdgpu_dc_debug_mask & DC_DISABLE_CLOCK_GATING)
@ -5629,7 +5628,8 @@ static void apply_dsc_policy_for_stream(struct amdgpu_dm_connector *aconnector,
dc_dsc_policy_set_enable_dsc_when_not_needed(
aconnector->dsc_settings.dsc_force_enable == DSC_CLK_FORCE_ENABLE);
if (aconnector->dc_link && sink->sink_signal == SIGNAL_TYPE_EDP && !dc->debug.disable_dsc_edp &&
if (aconnector->dc_link && sink->sink_signal == SIGNAL_TYPE_EDP &&
!aconnector->dc_link->panel_config.dsc.disable_dsc_edp &&
dc->caps.edp_dsc_support && aconnector->dsc_settings.dsc_force_enable != DSC_CLK_FORCE_DISABLE) {
apply_dsc_policy_for_edp(aconnector, sink, stream, dsc_caps, max_dsc_target_bpp_limit_override);

19
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
View File

@ -916,6 +916,25 @@ void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, unsigne
//amdgpu_device_gpu_recover(dc_context->driver-context, NULL);
}
void dm_helpers_init_panel_settings(
struct dc_context *ctx,
struct dc_panel_config *panel_config)
{
// Feature DSC
panel_config->dsc.disable_dsc_edp = false;
panel_config->dsc.force_dsc_edp_policy = 0;
}
void dm_helpers_override_panel_settings(
struct dc_context *ctx,
struct dc_panel_config *panel_config)
{
// Feature DSC
if (amdgpu_dc_debug_mask & DC_DISABLE_DSC) {
panel_config->dsc.disable_dsc_edp = true;
}
}
void *dm_helpers_allocate_gpu_mem(
struct dc_context *ctx,
enum dc_gpu_mem_alloc_type type,

10
drivers/gpu/drm/amd/display/dc/core/dc_link.c
View File

@ -1311,6 +1311,14 @@ static bool detect_link_and_local_sink(struct dc_link *link,
sink->edid_caps.audio_modes[i].sample_rate,
sink->edid_caps.audio_modes[i].sample_size);
}
if (link->connector_signal == SIGNAL_TYPE_EDP) {
// Init dc_panel_config
dm_helpers_init_panel_settings(dc_ctx, &link->panel_config);
// Override dc_panel_config if system has specific settings
dm_helpers_override_panel_settings(dc_ctx, &link->panel_config);
}
} else {
/* From Connected-to-Disconnected. */
link->type = dc_connection_none;
@ -4736,7 +4744,7 @@ bool dc_link_should_enable_fec(const struct dc_link *link)
else if (link->connector_signal == SIGNAL_TYPE_EDP
&& (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.
dsc_support.DSC_SUPPORT == false
|| link->dc->debug.disable_dsc_edp
|| link->panel_config.dsc.disable_dsc_edp
|| !link->dc->caps.edp_dsc_support))
force_disable = true;

4
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
View File

@ -3743,7 +3743,7 @@ static bool decide_edp_link_settings_with_dsc(struct dc_link *link,
unsigned int policy = 0;
policy = link->ctx->dc->debug.force_dsc_edp_policy;
policy = link->panel_config.dsc.force_dsc_edp_policy;
if (max_link_rate == LINK_RATE_UNKNOWN)
max_link_rate = link->verified_link_cap.link_rate;
/*
@ -3909,7 +3909,7 @@ bool decide_link_settings(struct dc_stream_state *stream,
if (stream->timing.flags.DSC) {
enum dc_link_rate max_link_rate = LINK_RATE_UNKNOWN;
if (link->ctx->dc->debug.force_dsc_edp_policy) {
if (link->panel_config.dsc.force_dsc_edp_policy) {
/* calculate link max link rate cap*/
struct dc_link_settings tmp_link_setting;
struct dc_crtc_timing tmp_timing = stream->timing;

2
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -802,8 +802,6 @@ struct dc_debug_options {
bool validate_dml_output;
bool enable_dmcub_surface_flip;
bool usbc_combo_phy_reset_wa;
bool disable_dsc_edp;
unsigned int force_dsc_edp_policy;
bool enable_dram_clock_change_one_display_vactive;
/* TODO - remove once tested */
bool legacy_dp2_lt;

10
drivers/gpu/drm/amd/display/dc/dc_link.h
View File

@ -113,6 +113,15 @@ struct psr_settings {
unsigned int psr_power_opt;
};
/* To split out "global" and "per-panel" config settings.
* Add a struct dc_panel_config under dc_link
*/
struct dc_panel_config {
struct dsc {
bool disable_dsc_edp;
unsigned int force_dsc_edp_policy;
} dsc;
};
/*
* A link contains one or more sinks and their connected status.
* The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
@ -233,6 +242,7 @@ struct dc_link {
struct gpio *hpd_gpio;
enum dc_link_fec_state fec_state;
struct dc_panel_config panel_config;
enum phy_state phy_state;
};

7
drivers/gpu/drm/amd/display/dc/dm_helpers.h
View File

@ -171,7 +171,12 @@ void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, unsigne
// 0x1 = Result_OK, 0xFE = Result_UnkmownCmd, 0x0 = Status_Busy
#define IS_SMU_TIMEOUT(result) \
(result == 0x0)
void dm_helpers_init_panel_settings(
struct dc_context *ctx,
struct dc_panel_config *config);
void dm_helpers_override_panel_settings(
struct dc_context *ctx,
struct dc_panel_config *config);
int dm_helper_dmub_aux_transfer_sync(
struct dc_context *ctx,
const struct dc_link *link,