gpu: host1x: Avoid trying to use GART on Tegra20
Since commit c7e3ca515e78 ("iommu/tegra: gart: Do not register with bus") quite some time ago, the GART driver has effectively disabled itself to avoid issues with the GPU driver expecting it to work in ways that it doesn't. As of commit 57365a04c921 ("iommu: Move bus setup to IOMMU device registration") that bodge no longer works, but really the GPU driver should be responsible for its own behaviour anyway. Make the workaround explicit. Reported-by: Jon Hunter <jonathanh@nvidia.com> Suggested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -1093,6 +1093,10 @@ static bool host1x_drm_wants_iommu(struct host1x_device *dev)
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struct host1x *host1x = dev_get_drvdata(dev->dev.parent);
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struct iommu_domain *domain;
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/* Our IOMMU usage policy doesn't currently play well with GART */
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if (of_machine_is_compatible("nvidia,tegra20"))
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return false;
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/*
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* If the Tegra DRM clients are backed by an IOMMU, push buffers are
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* likely to be allocated beyond the 32-bit boundary if sufficient
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@ -292,6 +292,10 @@ static void host1x_setup_virtualization_tables(struct host1x *host)
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static bool host1x_wants_iommu(struct host1x *host1x)
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{
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/* Our IOMMU usage policy doesn't currently play well with GART */
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if (of_machine_is_compatible("nvidia,tegra20"))
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return false;
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/*
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* If we support addressing a maximum of 32 bits of physical memory
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* and if the host1x firewall is enabled, there's no need to enable
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