net: bcmgenet: correct MIB access of UniMAC RUNT counters
[ Upstream commit 1ad3d225e5a40ca6c586989b4baaca710544c15a ] The gap between the Tx status counters and the Rx RUNT counters is now being added to allow correct reporting of the registers. Fixes: 1c1008c793fa ("net: bcmgenet: add main driver file") Signed-off-by: Doug Berger <opendmb@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -876,13 +876,16 @@ static void bcmgenet_update_mib_counters(struct bcmgenet_priv *priv)
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case BCMGENET_STAT_NETDEV:
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case BCMGENET_STAT_SOFT:
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continue;
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case BCMGENET_STAT_MIB_RX:
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case BCMGENET_STAT_MIB_TX:
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case BCMGENET_STAT_RUNT:
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if (s->type != BCMGENET_STAT_MIB_RX)
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offset = BCMGENET_STAT_OFFSET;
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offset += BCMGENET_STAT_OFFSET;
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/* fall through */
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case BCMGENET_STAT_MIB_TX:
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offset += BCMGENET_STAT_OFFSET;
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/* fall through */
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case BCMGENET_STAT_MIB_RX:
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val = bcmgenet_umac_readl(priv,
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UMAC_MIB_START + j + offset);
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offset = 0; /* Reset Offset */
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break;
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case BCMGENET_STAT_MISC:
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if (GENET_IS_V1(priv)) {
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