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Two fixes for omaps for v4.7 merge window, one to enable

Browse Source 
ARM errata for am437x, and the other to add ARM errtum
 workaround for dra7.
 
 AFAIK these both can wait for v4.7, we can then request them
 for stable kernels as needed.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXNgn7AAoJEBvUPslcq6VzI6oQANRdntofdJ4P0D5+pF6uGWoh
 MWGRHhPYiPa9AagsU+mpjp/eefAD94vuEAhUb+oTZqHUBCuBjeW5/XGbFBFpUqZY
 ENvsuahdkFLBjG6Aobk55vlWFghvMWZRZysGPJECwBXZk25JAjN/eIZ9JbSnBtvR
 +6wrpMgKGEDZUxDlyxur7w+CbqtS2z4YwDwgXg7rIlAihsGV+4QyRwfLj3FlgoKf
 GRvU5uLbXWiDHOqT4TtKDUV701BqeP9nd3cPKRtKFNoljrxG1CnoT15dmI1J/2Wh
 z/5+F0rmqJkqw9R1RJ+/oXdkagMwPKvKub1+MZi6o9QsqOHUIzYuiTK6hosWlYJl
 heTBeKdBRoB1lUu6dw4olV2g88AaYK7fXZJqX06lnIykjoeuQXUrMHfJ/ZC98Tpv
 uJ6Tl9Q0noKllUFT2CHeW6n/zGOM2lxauWE/ZsjiIe/ksTbh02BCaQA9HsgvcWyB
 TLqFpiP0Goul0lvjCCsQNPoRdvR+zPi0dd6cPcrWLgFmlWmtU1bR5yC6/0o6y/3r
 6RgWjxyikcFS0j50j1MRehvIzFVdjBTK5meTIloO8omrje0BI2W1Uft1yuSL/kzO
 bKKxLB3h1VAWX6UiLR1FfdjS/Kj8sxJDcdAh4TCU6JOppCeT114LEm7iHJOCdExs
 waiRrRf1xAsdR0NwK6h8
 =0ahk
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.7/fixes-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Two fixes for omaps for v4.7 merge window, one to enable
ARM errata for am437x, and the other to add ARM errtum
workaround for dra7.

AFAIK these both can wait for v4.7, we can then request them
for stable kernels as needed.

* tag 'omap-for-v4.7/fixes-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: AM43XX: Enable fixes for Cortex-A9 errata
  ARM: OMAP5 / DRA7: Introduce workaround for 801819

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-06-03 12:27:08 -07:00
commit c2b8d9200f
3 changed files with 54 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm/mach-omap2/Kconfig
View File

@ -67,6 +67,8 @@ config SOC_AM43XX
select HAVE_ARM_SCU
select GENERIC_CLOCKEVENTS_BROADCAST
select HAVE_ARM_TWD
select ARM_ERRATA_754322
select ARM_ERRATA_775420
config SOC_DRA7XX
bool "TI DRA7XX"
@ -240,4 +242,12 @@ endmenu
endif
config OMAP5_ERRATA_801819
bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
depends on SOC_OMAP5 || SOC_DRA7XX
help
A livelock can occur in the L2 cache arbitration that might prevent
a snoop from completing. Under certain conditions this can cause the
system to deadlock.
endmenu

1
arch/arm/mach-omap2/omap-secure.h
View File

@ -46,6 +46,7 @@
#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
#define OMAP5_MON_AMBA_IF_INDEX 0x108
#define OMAP5_DRA7_MON_SET_ACR_INDEX 0x107
/* Secure PPA(Primary Protected Application) APIs */
#define OMAP4_PPA_L2_POR_INDEX 0x23

48
arch/arm/mach-omap2/omap-smp.c
View File

@ -50,6 +50,39 @@ void __iomem *omap4_get_scu_base(void)
return scu_base;
}
#ifdef CONFIG_OMAP5_ERRATA_801819
void omap5_erratum_workaround_801819(void)
{
u32 acr, revidr;
u32 acr_mask;
/* REVIDR[3] indicates erratum fix available on silicon */
asm volatile ("mrc p15, 0, %0, c0, c0, 6" : "=r" (revidr));
if (revidr & (0x1 << 3))
return;
asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
/*
* BIT(27) - Disables streaming. All write-allocate lines allocate in
* the L1 or L2 cache.
* BIT(25) - Disables streaming. All write-allocate lines allocate in
* the L1 cache.
*/
acr_mask = (0x3 << 25) | (0x3 << 27);
/* do we already have it done.. if yes, skip expensive smc */
if ((acr & acr_mask) == acr_mask)
return;
acr |= acr_mask;
omap_smc1(OMAP5_DRA7_MON_SET_ACR_INDEX, acr);
pr_debug("%s: ARM erratum workaround 801819 applied on CPU%d\n",
__func__, smp_processor_id());
}
#else
static inline void omap5_erratum_workaround_801819(void) { }
#endif
static void omap4_secondary_init(unsigned int cpu)
{
/*
@ -64,12 +97,15 @@ static void omap4_secondary_init(unsigned int cpu)
omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX,
4, 0, 0, 0, 0, 0);
/*
* Configure the CNTFRQ register for the secondary cpu's which
* indicates the frequency of the cpu local timers.
*/
if (soc_is_omap54xx() || soc_is_dra7xx())
if (soc_is_omap54xx() || soc_is_dra7xx()) {
/*
* Configure the CNTFRQ register for the secondary cpu's which
* indicates the frequency of the cpu local timers.
*/
set_cntfreq();
/* Configure ACR to disable streaming WA for 801819 */
omap5_erratum_workaround_801819();
}
/*
* Synchronise with the boot thread.
@ -218,6 +254,8 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
if (cpu_is_omap446x())
startup_addr = omap4460_secondary_startup;
if (soc_is_dra74x() || soc_is_omap54xx())
omap5_erratum_workaround_801819();
/*
* Write the address of secondary startup routine into the