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Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

Browse Source 
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  [POWERPC] Bolt in SLB entry for kernel stack on secondary cpus
  [POWERPC] PS3: Update ps3_defconfig
  [POWERPC] PS3: Remove unsupported wakeup sources
  [POWERPC] PS3: Make ps3_virq_setup and ps3_virq_destroy static
  [POWERPC] PS3: Add time include to lpm
  [POWERPC] Fix slb.c compile warnings
  [POWERPC] Xilinx: Fix compile warnings
  [POWERPC] Squash build warning for print of resource_size_t in fsl_soc.c
  [RAPIDIO] fix current kernel-doc notation
  [POWERPC] 86xx: mpc8610_hpcd: add support for PCI Express x8 slot
  Fix a potential issue in mpc52xx uart driver
  [POWERPC] mpc5200: Allow for fixed speed MII configurations
  [POWERPC] 86xx: Fix the wrong serial1 interrupt for 8610 board
This commit is contained in:
Linus Torvalds 2008-05-03 10:01:33 -07:00
commit c36c804559
17 changed files with 230 additions and 121 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Documentation/powerpc/mpc52xx-device-tree-bindings.txt
View File

@ -237,6 +237,17 @@ Each GPIO controller node should have the empty property gpio-controller and
according to the bit numbers in the GPIO control registers. The second cell
is for flags which is currently unsused.
8) FEC nodes
The FEC node can specify one of the following properties to configure
the MII link:
"fsl,7-wire-mode" - An empty property that specifies the link uses 7-wire
mode instead of MII
"current-speed" - Specifies that the MII should be configured for a fixed
speed. This property should contain two cells. The
first cell specifies the speed in Mbps and the second
should be '0' for half duplex and '1' for full duplex
"phy-handle" - Contains a phandle to an Ethernet PHY.
IV - Extra Notes
================

23
arch/powerpc/boot/dts/mpc8610_hpcd.dts
View File

@ -21,6 +21,7 @@
serial1 = &serial1;
pci0 = &pci0;
pci1 = &pci1;
pci2 = &pci2;
};
cpus {
@ -105,7 +106,7 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
interrupts = <28 2>;
interrupts = <42 2>;
interrupt-parent = <&mpic>;
};
@ -322,4 +323,24 @@
};
};
};
pci2: pcie@e0009000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
compatible = "fsl,mpc8641-pcie";
reg = <0xe0009000 0x00001000>;
ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
bus-range = <0 255>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <0x0000 0 0 1 &mpic 4 1
0x0000 0 0 2 &mpic 5 1
0x0000 0 0 3 &mpic 6 1
0x0000 0 0 4 &mpic 7 1>;
interrupt-parent = <&mpic>;
interrupts = <25 2>;
clock-frequency = <33333333>;
};
};

132
arch/powerpc/configs/ps3_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.25-rc6
# Thu Mar 20 11:07:04 2008
# Linux kernel version: 2.6.25
# Mon Apr 28 12:39:10 2008
#
CONFIG_PPC64=y
@ -30,6 +30,9 @@ CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_HAVE_SETUP_PER_CPU_AREA=y
CONFIG_IRQ_PER_CPU=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_ARCH_HAS_ILOG2_U64=y
@ -73,8 +76,6 @@ CONFIG_POSIX_MQUEUE=y
CONFIG_LOG_BUF_SHIFT=17
# CONFIG_CGROUPS is not set
# CONFIG_GROUP_SCHED is not set
# CONFIG_USER_SCHED is not set
# CONFIG_CGROUP_SCHED is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
@ -161,7 +162,6 @@ CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_PPC_PMAC is not set
# CONFIG_PPC_MAPLE is not set
# CONFIG_PPC_PASEMI is not set
# CONFIG_PPC_CELLEB is not set
CONFIG_PPC_PS3=y
#
@ -181,6 +181,7 @@ CONFIG_PS3_LPM=m
CONFIG_PPC_CELL=y
# CONFIG_PPC_CELL_NATIVE is not set
# CONFIG_PPC_IBM_CELL_BLADE is not set
# CONFIG_PPC_CELLEB is not set
#
# Cell Broadband Engine options
@ -205,9 +206,9 @@ CONFIG_SPU_BASE=y
#
# Kernel options
#
# CONFIG_TICK_ONESHOT is not set
CONFIG_TICK_ONESHOT=y
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_HIGH_RES_TIMERS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
@ -221,7 +222,6 @@ CONFIG_PREEMPT_NONE=y
CONFIG_BINFMT_ELF=y
CONFIG_COMPAT_BINFMT_ELF=y
CONFIG_BINFMT_MISC=y
CONFIG_FORCE_MAX_ZONEORDER=13
# CONFIG_IOMMU_VMERGE is not set
CONFIG_IOMMU_HELPER=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
@ -255,6 +255,7 @@ CONFIG_BOUNCE=y
CONFIG_ARCH_MEMORY_PROBE=y
# CONFIG_PPC_HAS_HASH_64K is not set
# CONFIG_PPC_64K_PAGES is not set
CONFIG_FORCE_MAX_ZONEORDER=13
# CONFIG_SCHED_SMT is not set
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
@ -272,7 +273,9 @@ CONFIG_GENERIC_ISA_DMA=y
# CONFIG_PCI_SYSCALL is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
CONFIG_PAGE_OFFSET=0xc000000000000000
CONFIG_KERNEL_START=0xc000000000000000
CONFIG_PHYSICAL_START=0x00000000
#
# Networking
@ -292,7 +295,7 @@ CONFIG_XFRM=y
# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
@ -301,6 +304,7 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
@ -332,8 +336,10 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=y
CONFIG_INET6_XFRM_MODE_BEET=y
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_IPV6_SIT=y
CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_IPV6_MULTIPLE_TABLES is not set
# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
@ -392,8 +398,6 @@ CONFIG_IEEE80211=m
CONFIG_IEEE80211_CRYPT_WEP=m
CONFIG_IEEE80211_CRYPT_CCMP=m
CONFIG_IEEE80211_CRYPT_TKIP=m
CONFIG_IEEE80211_SOFTMAC=m
# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
@ -507,6 +511,7 @@ CONFIG_WLAN_80211=y
# CONFIG_LIBERTAS is not set
# CONFIG_USB_ZD1201 is not set
# CONFIG_USB_NET_RNDIS_WLAN is not set
# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_HOSTAP is not set
#
@ -578,6 +583,7 @@ CONFIG_INPUT_JOYSTICK=y
# CONFIG_JOYSTICK_SPACEBALL is not set
# CONFIG_JOYSTICK_STINGER is not set
# CONFIG_JOYSTICK_TWIDJOY is not set
# CONFIG_JOYSTICK_ZHENHUA is not set
# CONFIG_JOYSTICK_JOYDUMP is not set
# CONFIG_JOYSTICK_XPAD is not set
# CONFIG_INPUT_TABLET is not set
@ -641,6 +647,7 @@ CONFIG_SSB_POSSIBLE=y
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
@ -760,10 +767,6 @@ CONFIG_SND_PS3_DEFAULT_START_DELAY=2000
#
# CONFIG_SND_SOC is not set
#
# SoC Audio support for SuperH
#
#
# ALSA SoC audio for Freescale SOCs
#
@ -849,6 +852,7 @@ CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_LIBUSUAL is not set
#
@ -893,10 +897,6 @@ CONFIG_USB_MON=y
# CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set
# CONFIG_DMADEVICES is not set
#
# Userspace I/O
#
# CONFIG_UIO is not set
#
@ -986,7 +986,6 @@ CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@ -1059,9 +1058,10 @@ CONFIG_NLS_ISO8859_1=y
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
@ -1071,6 +1071,7 @@ CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_HAVE_LMB=y
#
# Kernel hacking
@ -1078,6 +1079,7 @@ CONFIG_HAS_DMA=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=2048
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
@ -1093,12 +1095,16 @@ CONFIG_SCHED_DEBUG=y
# CONFIG_RT_MUTEX_TESTER is not set
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
CONFIG_DEBUG_SPINLOCK_SLEEP=y
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
CONFIG_DEBUG_LIST=y
# CONFIG_DEBUG_SG is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
@ -1121,51 +1127,81 @@ CONFIG_IRQSTACKS=y
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_SEQIV=m
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_GF128MUL=m
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
CONFIG_CRYPTO_CCM=m
CONFIG_CRYPTO_GCM=m
CONFIG_CRYPTO_SEQIV=m
#
# Block modes
#
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CTR=m
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=m
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_XTS is not set
#
# Hash modes
#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_NULL is not set
#
# Digest
#
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_MICHAEL_MIC=m
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
CONFIG_CRYPTO_GF128MUL=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_XTS is not set
CONFIG_CRYPTO_CTR=m
CONFIG_CRYPTO_GCM=m
CONFIG_CRYPTO_CCM=m
# CONFIG_CRYPTO_CRYPTD is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_ANUBIS is not set
CONFIG_CRYPTO_ARC4=m
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_SEED is not set
CONFIG_CRYPTO_SALSA20=m
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
CONFIG_CRYPTO_MICHAEL_MIC=m
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_TEST is not set
# CONFIG_CRYPTO_AUTHENC is not set
CONFIG_CRYPTO_LZO=m
CONFIG_CRYPTO_HW=y
# CONFIG_PPC_CLOCK is not set
# CONFIG_VIRTUALIZATION is not set

2
arch/powerpc/kernel/smp.c
View File

@ -386,6 +386,8 @@ static void __init smp_create_idle(unsigned int cpu)
panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
#ifdef CONFIG_PPC64
paca[cpu].__current = p;
paca[cpu].kstack = (unsigned long) task_thread_info(p)
+ THREAD_SIZE - STACK_FRAME_OVERHEAD;
#endif
current_set[cpu] = task_thread_info(p);
task_thread_info(p)->cpu = cpu;

27
arch/powerpc/mm/slb.c
View File

@ -30,7 +30,7 @@
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#define DBG pr_debug
#endif
extern void slb_allocate_realmode(unsigned long ea);
@ -44,13 +44,13 @@ static void slb_allocate(unsigned long ea)
slb_allocate_realmode(ea);
}
#define slb_esid_mask(ssize) \
(((ssize) == MMU_SEGSIZE_256M)? ESID_MASK: ESID_MASK_1T)
static inline unsigned long mk_esid_data(unsigned long ea, int ssize,
unsigned long slot)
{
unsigned long mask;
mask = (ssize == MMU_SEGSIZE_256M)? ESID_MASK: ESID_MASK_1T;
return (ea & mask) | SLB_ESID_V | slot;
return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | slot;
}
#define slb_vsid_shift(ssize) \
@ -279,8 +279,8 @@ void slb_initialize(void)
patch_slb_encoding(slb_compare_rr_to_size,
mmu_slb_size);
DBG("SLB: linear LLP = %04x\n", linear_llp);
DBG("SLB: io LLP = %04x\n", io_llp);
DBG("SLB: linear LLP = %04lx\n", linear_llp);
DBG("SLB: io LLP = %04lx\n", io_llp);
}
get_paca()->stab_rr = SLB_NUM_BOLTED;
@ -301,11 +301,16 @@ void slb_initialize(void)
create_shadowed_slbe(VMALLOC_START, mmu_kernel_ssize, vflags, 1);
/* For the boot cpu, we're running on the stack in init_thread_union,
* which is in the first segment of the linear mapping, and also
* get_paca()->kstack hasn't been initialized yet.
* For secondary cpus, we need to bolt the kernel stack entry now.
*/
slb_shadow_clear(2);
if (raw_smp_processor_id() != boot_cpuid &&
(get_paca()->kstack & slb_esid_mask(mmu_kernel_ssize)) > PAGE_OFFSET)
create_shadowed_slbe(get_paca()->kstack,
mmu_kernel_ssize, lflags, 2);
/* We don't bolt the stack for the time being - we're in boot,
* so the stack is in the bolted segment. By the time it goes
* elsewhere, we'll call _switch() which will bolt in the new
* one. */
asm volatile("isync":::"memory");
}

4
arch/powerpc/platforms/ps3/interrupt.c
View File

@ -167,7 +167,7 @@ static struct irq_chip ps3_irq_chip = {
* ps3_private data.
*/
int ps3_virq_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
static int ps3_virq_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
unsigned int *virq)
{
int result;
@ -217,7 +217,7 @@ fail_create:
* Clears chip data and calls irq_dispose_mapping() for the virq.
*/
int ps3_virq_destroy(unsigned int virq)
static int ps3_virq_destroy(unsigned int virq)
{
const struct ps3_private *pd = get_irq_chip_data(virq);

9
arch/powerpc/sysdev/fsl_rio.c
View File

@ -176,6 +176,7 @@ struct rio_priv {
/**
* fsl_rio_doorbell_send - Send a MPC85xx doorbell message
* @mport: RapidIO master port info
* @index: ID of RapidIO interface
* @destid: Destination ID of target device
* @data: 16-bit info field of RapidIO doorbell message
@ -211,6 +212,7 @@ static int fsl_rio_doorbell_send(struct rio_mport *mport,
/**
* fsl_local_config_read - Generate a MPC85xx local config space read
* @mport: RapidIO master port info
* @index: ID of RapdiIO interface
* @offset: Offset into configuration space
* @len: Length (in bytes) of the maintenance transaction
@ -232,6 +234,7 @@ static int fsl_local_config_read(struct rio_mport *mport,
/**
* fsl_local_config_write - Generate a MPC85xx local config space write
* @mport: RapidIO master port info
* @index: ID of RapdiIO interface
* @offset: Offset into configuration space
* @len: Length (in bytes) of the maintenance transaction
@ -254,6 +257,7 @@ static int fsl_local_config_write(struct rio_mport *mport,
/**
* fsl_rio_config_read - Generate a MPC85xx read maintenance transaction
* @mport: RapidIO master port info
* @index: ID of RapdiIO interface
* @destid: Destination ID of transaction
* @hopcount: Number of hops to target device
@ -295,6 +299,7 @@ fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid,
/**
* fsl_rio_config_write - Generate a MPC85xx write maintenance transaction
* @mport: RapidIO master port info
* @index: ID of RapdiIO interface
* @destid: Destination ID of transaction
* @hopcount: Number of hops to target device
@ -985,8 +990,8 @@ static inline void fsl_rio_info(struct device *dev, u32 ccsr)
}
/**
* fsl_rio_setup - Setup MPC85xx RapidIO interface
* @fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
* fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
* @dev: of_device pointer
*
* Initializes MPC85xx RapidIO hardware interface, configures
* master port with system-specific info, and registers the

4
arch/powerpc/sysdev/fsl_soc.c
View File

@ -389,8 +389,8 @@ static int __init gfar_of_init(void)
}
gfar_data.phy_id = *id;
snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%x",
res.start);
snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx",
(unsigned long long)res.start);
of_node_put(phy);
of_node_put(mdio);

2
arch/powerpc/sysdev/xilinx_intc.c
View File

@ -107,7 +107,7 @@ xilinx_intc_init(struct device_node *np)
}
regs = ioremap(res.start, 32);
printk(KERN_INFO "Xilinx intc at 0x%08X mapped to 0x%p\n",
printk(KERN_INFO "Xilinx intc at 0x%08LX mapped to 0x%p\n",
res.start, regs);
/* Setup interrupt controller */

6
drivers/char/xilinx_hwicap/xilinx_hwicap.c
View File

@ -623,8 +623,8 @@ static int __devinit hwicap_setup(struct device *dev, int id,
if (!request_mem_region(drvdata->mem_start,
drvdata->mem_size, DRIVER_NAME)) {
dev_err(dev, "Couldn't lock memory region at %p\n",
(void *)regs_res->start);
dev_err(dev, "Couldn't lock memory region at %Lx\n",
regs_res->start);
retval = -EBUSY;
goto failed1;
}
@ -643,7 +643,7 @@ static int __devinit hwicap_setup(struct device *dev, int id,
mutex_init(&drvdata->sem);
drvdata->is_open = 0;
dev_info(dev, "ioremap %lx to %p with size %x\n",
dev_info(dev, "ioremap %lx to %p with size %Lx\n",
(unsigned long int)drvdata->mem_start,
drvdata->base_address, drvdata->mem_size);

97
drivers/net/fec_mpc52xx.c
View File

@ -43,6 +43,29 @@
#define DRIVER_NAME "mpc52xx-fec"
#define FEC5200_PHYADDR_NONE (-1)
#define FEC5200_PHYADDR_7WIRE (-2)
/* Private driver data structure */
struct mpc52xx_fec_priv {
int duplex;
int speed;
int r_irq;
int t_irq;
struct mpc52xx_fec __iomem *fec;
struct bcom_task *rx_dmatsk;
struct bcom_task *tx_dmatsk;
spinlock_t lock;
int msg_enable;
/* MDIO link details */
int phy_addr;
unsigned int phy_speed;
struct phy_device *phydev;
enum phy_state link;
};
static irqreturn_t mpc52xx_fec_interrupt(int, void *);
static irqreturn_t mpc52xx_fec_rx_interrupt(int, void *);
static irqreturn_t mpc52xx_fec_tx_interrupt(int, void *);
@ -223,7 +246,7 @@ static int mpc52xx_fec_phy_start(struct net_device *dev)
struct mpc52xx_fec_priv *priv = netdev_priv(dev);
int err;
if (!priv->has_phy)
if (priv->phy_addr < 0)
return 0;
err = mpc52xx_fec_init_phy(dev);
@ -243,7 +266,7 @@ static void mpc52xx_fec_phy_stop(struct net_device *dev)
{
struct mpc52xx_fec_priv *priv = netdev_priv(dev);
if (!priv->has_phy)
if (!priv->phydev)
return;
phy_disconnect(priv->phydev);
@ -255,7 +278,7 @@ static void mpc52xx_fec_phy_stop(struct net_device *dev)
static int mpc52xx_fec_phy_mii_ioctl(struct mpc52xx_fec_priv *priv,
struct mii_ioctl_data *mii_data, int cmd)
{
if (!priv->has_phy)
if (!priv->phydev)
return -ENOTSUPP;
return phy_mii_ioctl(priv->phydev, mii_data, cmd);
@ -265,7 +288,7 @@ static void mpc52xx_fec_phy_hw_init(struct mpc52xx_fec_priv *priv)
{
struct mpc52xx_fec __iomem *fec = priv->fec;
if (!priv->has_phy)
if (priv->phydev)
return;
out_be32(&fec->mii_speed, priv->phy_speed);
@ -704,7 +727,7 @@ static void mpc52xx_fec_start(struct net_device *dev)
rcntrl = FEC_RX_BUFFER_SIZE << 16; /* max frame length */
rcntrl |= FEC_RCNTRL_FCE;
if (priv->has_phy)
if (priv->phy_addr != FEC5200_PHYADDR_7WIRE)
rcntrl |= FEC_RCNTRL_MII_MODE;
if (priv->duplex == DUPLEX_FULL)
@ -864,7 +887,10 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
struct net_device *ndev;
struct mpc52xx_fec_priv *priv = NULL;
struct resource mem;
const phandle *ph;
struct device_node *phy_node;
const phandle *phy_handle;
const u32 *prop;
int prop_size;
phys_addr_t rx_fifo;
phys_addr_t tx_fifo;
@ -948,26 +974,37 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
mpc52xx_fec_get_paddr(ndev, ndev->dev_addr);
priv->msg_enable = netif_msg_init(debug, MPC52xx_MESSAGES_DEFAULT);
priv->duplex = DUPLEX_FULL;
/* is the phy present in device tree? */
ph = of_get_property(op->node, "phy-handle", NULL);
if (ph) {
const unsigned int *prop;
struct device_node *phy_dn;
priv->has_phy = 1;
/*
* Link mode configuration
*/
phy_dn = of_find_node_by_phandle(*ph);
prop = of_get_property(phy_dn, "reg", NULL);
priv->phy_addr = *prop;
of_node_put(phy_dn);
/* Phy speed */
/* Start with safe defaults for link connection */
priv->phy_addr = FEC5200_PHYADDR_NONE;
priv->speed = 100;
priv->duplex = DUPLEX_HALF;
priv->phy_speed = ((mpc52xx_find_ipb_freq(op->node) >> 20) / 5) << 1;
} else {
dev_info(&ndev->dev, "can't find \"phy-handle\" in device"
" tree, using 7-wire mode\n");
/* the 7-wire property means don't use MII mode */
if (of_find_property(op->node, "fsl,7-wire-mode", NULL))
priv->phy_addr = FEC5200_PHYADDR_7WIRE;
/* The current speed preconfigures the speed of the MII link */
prop = of_get_property(op->node, "current-speed", &prop_size);
if (prop && (prop_size >= sizeof(u32) * 2)) {
priv->speed = prop[0];
priv->duplex = prop[1] ? DUPLEX_FULL : DUPLEX_HALF;
}
/* If there is a phy handle, setup link to that phy */
phy_handle = of_get_property(op->node, "phy-handle", &prop_size);
if (phy_handle && (prop_size >= sizeof(phandle))) {
phy_node = of_find_node_by_phandle(*phy_handle);
prop = of_get_property(phy_node, "reg", &prop_size);
if (prop && (prop_size >= sizeof(u32)))
if ((*prop >= 0) && (*prop < PHY_MAX_ADDR))
priv->phy_addr = *prop;
of_node_put(phy_node);
}
/* Hardware init */
@ -982,6 +1019,20 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
if (rv < 0)
goto probe_error;
/* Now report the link setup */
switch (priv->phy_addr) {
case FEC5200_PHYADDR_NONE:
dev_info(&ndev->dev, "Fixed speed MII link: %i%cD\n",
priv->speed, priv->duplex ? 'F' : 'H');
break;
case FEC5200_PHYADDR_7WIRE:
dev_info(&ndev->dev, "using 7-wire PHY mode\n");
break;
default:
dev_info(&ndev->dev, "Using PHY at MDIO address %i\n",
priv->phy_addr);
}
/* We're done ! */
dev_set_drvdata(&op->dev, ndev);

19
drivers/net/fec_mpc52xx.h
View File

@ -26,25 +26,6 @@
#define FEC_WATCHDOG_TIMEOUT ((400*HZ)/1000)
struct mpc52xx_fec_priv {
int duplex;
int r_irq;
int t_irq;
struct mpc52xx_fec __iomem *fec;
struct bcom_task *rx_dmatsk;
struct bcom_task *tx_dmatsk;
spinlock_t lock;
int msg_enable;
int has_phy;
unsigned int phy_speed;
unsigned int phy_addr;
struct phy_device *phydev;
enum phy_state link;
int speed;
};
/* ======================================================================== */
/* Hardware register sets & bits */
/* ======================================================================== */

1
drivers/ps3/ps3-lpm.c
View File

@ -22,6 +22,7 @@
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/uaccess.h>
#include <asm/time.h>
#include <asm/ps3.h>
#include <asm/lv1call.h>
#include <asm/cell-pmu.h>

7
drivers/ps3/ps3-sys-manager.c
View File

@ -184,10 +184,7 @@ enum ps3_sys_manager_next_op {
/**
* enum ps3_sys_manager_wake_source - Next-op wakeup source (bit position mask).
* @PS3_SM_WAKE_DEFAULT: Disk insert, power button, eject button, IR
* controller, and bluetooth controller.
* @PS3_SM_WAKE_RTC:
* @PS3_SM_WAKE_RTC_ERROR:
* @PS3_SM_WAKE_DEFAULT: Disk insert, power button, eject button.
* @PS3_SM_WAKE_W_O_L: Ether or wireless LAN.
* @PS3_SM_WAKE_P_O_R: Power on reset.
*
@ -200,8 +197,6 @@ enum ps3_sys_manager_next_op {
enum ps3_sys_manager_wake_source {
/* version 3 */
PS3_SM_WAKE_DEFAULT = 0,
PS3_SM_WAKE_RTC = 0x00000040,
PS3_SM_WAKE_RTC_ERROR = 0x00000080,
PS3_SM_WAKE_W_O_L = 0x00000400,
PS3_SM_WAKE_P_O_R = 0x80000000,
};

2
drivers/serial/mpc52xx_uart.c
View File

@ -783,7 +783,9 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
}
}
spin_unlock(&port->lock);
tty_flip_buffer_push(tty);
spin_lock(&port->lock);
return psc_ops->raw_rx_rdy(port);
}

3
include/asm-powerpc/ps3.h
View File

@ -178,9 +178,6 @@ enum ps3_cpu_binding {
PS3_BINDING_CPU_1 = 1,
};
int ps3_virq_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
unsigned int *virq);
int ps3_virq_destroy(unsigned int virq);
int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
unsigned int *virq);
int ps3_irq_plug_destroy(unsigned int virq);

2
include/linux/rio.h
View File

@ -161,6 +161,8 @@ enum rio_phy_type {
* @ops: configuration space functions
* @id: Port ID, unique among all ports
* @index: Port index, unique among all port interfaces of the same type
* @sys_size: RapidIO common transport system size
* @phy_type: RapidIO phy type
* @name: Port name string
* @priv: Master port private data
*/