From c387eea58f931fe5d008df88cc75dfc3c704e3bf Mon Sep 17 00:00:00 2001
From: Michael Walle <michael@walle.cc>
Date: Wed, 16 Jun 2021 17:54:37 +0200
Subject: [PATCH] ARM: dts: ebaz4205: enable NAND support
The board features a 128MiB NAND chip and recently linux gained support
for the NAND controller on the Zynq SoC. Thus add the corresponding
devicetree nodes.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20210616155437.27378-4-michael@walle.cc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/boot/dts/zynq-ebaz4205.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/zynq-ebaz4205.dts b/arch/arm/boot/dts/zynq-ebaz4205.dts
index b0b836aedd76..53fa6dbfd8fd 100644
--- a/arch/arm/boot/dts/zynq-ebaz4205.dts
+++ b/arch/arm/boot/dts/zynq-ebaz4205.dts
@@ -48,6 +48,14 @@
pinctrl-0 = <&pinctrl_gpio0_default>;
};
+&nfc0 {
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ };
+};
+
&pinctrl0 {
pinctrl_gpio0_default: gpio0-default {
mux {
@@ -118,6 +126,10 @@
};
};
+&smcc {
+ status = "okay";
+};
+
&sdhci0 {
status = "okay";
disable-wp;