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spi: pxa2xx: Use inclusive language

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Replace master/slave by host/peripheral language in the documentation.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231208170436.3309648-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Andy Shevchenko 2023-12-08 19:02:54 +02:00 committed by Mark Brown
parent 88a50c1663
commit c3aeaf2f0e
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1 changed files with 24 additions and 24 deletions
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48
Documentation/spi/pxa2xx.rst
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@ -3,13 +3,13 @@ PXA2xx SPI on SSP driver HOWTO
============================== ==============================
This a mini HOWTO on the pxa2xx_spi driver. The driver turns a PXA2xx This a mini HOWTO on the pxa2xx_spi driver. The driver turns a PXA2xx
synchronous serial port into an SPI master controller synchronous serial port into an SPI host controller
(see Documentation/spi/spi-summary.rst). The driver has the following features (see Documentation/spi/spi-summary.rst). The driver has the following features
- Support for any PXA2xx and compatible SSP. - Support for any PXA2xx and compatible SSP.
- SSP PIO and SSP DMA data transfers. - SSP PIO and SSP DMA data transfers.
- External and Internal (SSPFRM) chip selects. - External and Internal (SSPFRM) chip selects.
- Per slave device (chip) configuration. - Per peripheral device (chip) configuration.
- Full suspend, freeze, resume support. - Full suspend, freeze, resume support.
The driver is built around a &struct spi_message FIFO serviced by kernel The driver is built around a &struct spi_message FIFO serviced by kernel
@ -17,10 +17,10 @@ thread. The kernel thread, spi_pump_messages(), drives message FIFO and
is responsible for queuing SPI transactions and setting up and launching is responsible for queuing SPI transactions and setting up and launching
the DMA or interrupt driven transfers. the DMA or interrupt driven transfers.
Declaring PXA2xx Master Controllers Declaring PXA2xx host controllers
----------------------------------- ---------------------------------
Typically, for a legacy platform, an SPI master is defined in the Typically, for a legacy platform, an SPI host controller is defined in the
arch/.../mach-*/board-*.c as a "platform device". The master configuration arch/.../mach-*/board-*.c as a "platform device". The host controller configuration
is passed to the driver via a table found in include/linux/spi/pxa2xx_spi.h:: is passed to the driver via a table found in include/linux/spi/pxa2xx_spi.h::
struct pxa2xx_spi_controller { struct pxa2xx_spi_controller {
@ -30,7 +30,7 @@ is passed to the driver via a table found in include/linux/spi/pxa2xx_spi.h::
}; };
The "pxa2xx_spi_controller.num_chipselect" field is used to determine the number of The "pxa2xx_spi_controller.num_chipselect" field is used to determine the number of
slave device (chips) attached to this SPI master. peripheral devices (chips) attached to this SPI host controller.
The "pxa2xx_spi_controller.enable_dma" field informs the driver that SSP DMA should The "pxa2xx_spi_controller.enable_dma" field informs the driver that SSP DMA should
be used. This caused the driver to acquire two DMA channels: Rx channel and be used. This caused the driver to acquire two DMA channels: Rx channel and
@ -40,8 +40,8 @@ See the "PXA2xx Developer Manual" section "DMA Controller".
For the new platforms the description of the controller and peripheral devices For the new platforms the description of the controller and peripheral devices
comes from Device Tree or ACPI. comes from Device Tree or ACPI.
NSSP MASTER SAMPLE NSSP HOST SAMPLE
------------------ ----------------
Below is a sample configuration using the PXA255 NSSP for a legacy platform:: Below is a sample configuration using the PXA255 NSSP for a legacy platform::
static struct resource pxa_spi_nssp_resources[] = { static struct resource pxa_spi_nssp_resources[] = {
@ -57,7 +57,7 @@ Below is a sample configuration using the PXA255 NSSP for a legacy platform::
}, },
}; };
static struct pxa2xx_spi_controller pxa_nssp_master_info = { static struct pxa2xx_spi_controller pxa_nssp_controller_info = {
.num_chipselect = 1, /* Matches the number of chips attached to NSSP */ .num_chipselect = 1, /* Matches the number of chips attached to NSSP */
.enable_dma = 1, /* Enables NSSP DMA */ .enable_dma = 1, /* Enables NSSP DMA */
}; };
@ -68,7 +68,7 @@ Below is a sample configuration using the PXA255 NSSP for a legacy platform::
.resource = pxa_spi_nssp_resources, .resource = pxa_spi_nssp_resources,
.num_resources = ARRAY_SIZE(pxa_spi_nssp_resources), .num_resources = ARRAY_SIZE(pxa_spi_nssp_resources),
.dev = { .dev = {
.platform_data = &pxa_nssp_master_info, /* Passed to driver */ .platform_data = &pxa_nssp_controller_info, /* Passed to driver */
}, },
}; };
@ -81,17 +81,17 @@ Below is a sample configuration using the PXA255 NSSP for a legacy platform::
(void)platform_add_device(devices, ARRAY_SIZE(devices)); (void)platform_add_device(devices, ARRAY_SIZE(devices));
} }
Declaring Slave Devices Declaring peripheral devices
----------------------- ----------------------------
Typically, for a legacy platform, each SPI slave (chip) is defined in the Typically, for a legacy platform, each SPI peripheral device (chip) is defined in the
arch/.../mach-*/board-*.c using the "spi_board_info" structure found in arch/.../mach-*/board-*.c using the "spi_board_info" structure found in
"linux/spi/spi.h". See "Documentation/spi/spi-summary.rst" for additional "linux/spi/spi.h". See "Documentation/spi/spi-summary.rst" for additional
information. information.
Each slave device attached to the PXA must provide slave specific configuration Each peripheral device (chip) attached to the PXA2xx must provide specific chip configuration
information via the structure "pxa2xx_spi_chip" found in information via the structure "pxa2xx_spi_chip" found in
"include/linux/spi/pxa2xx_spi.h". The pxa2xx_spi master controller driver "include/linux/spi/pxa2xx_spi.h". The PXA2xx host controller driver will use
will uses the configuration whenever the driver communicates with the slave the configuration whenever the driver communicates with the peripheral
device. All fields are optional. device. All fields are optional.
:: ::
@ -123,7 +123,7 @@ dma_burst_size == 0.
The "pxa2xx_spi_chip.timeout" fields is used to efficiently handle The "pxa2xx_spi_chip.timeout" fields is used to efficiently handle
trailing bytes in the SSP receiver FIFO. The correct value for this field is trailing bytes in the SSP receiver FIFO. The correct value for this field is
dependent on the SPI bus speed ("spi_board_info.max_speed_hz") and the specific dependent on the SPI bus speed ("spi_board_info.max_speed_hz") and the specific
slave device. Please note that the PXA2xx SSP 1 does not support trailing byte peripheral device. Please note that the PXA2xx SSP 1 does not support trailing byte
timeouts and must busy-wait any trailing bytes. timeouts and must busy-wait any trailing bytes.
NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the
@ -132,8 +132,8 @@ asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor
to accommodate these chips. to accommodate these chips.
NSSP SLAVE SAMPLE NSSP PERIPHERAL SAMPLE
----------------- ----------------------
For a legacy platform or in some other cases, the pxa2xx_spi_chip structure For a legacy platform or in some other cases, the pxa2xx_spi_chip structure
is passed to the pxa2xx_spi driver in the "spi_board_info.controller_data" is passed to the pxa2xx_spi driver in the "spi_board_info.controller_data"
field. Below is a sample configuration using the PXA255 NSSP. field. Below is a sample configuration using the PXA255 NSSP.
@ -161,16 +161,16 @@ field. Below is a sample configuration using the PXA255 NSSP.
.bus_num = 2, /* Framework bus number */ .bus_num = 2, /* Framework bus number */
.chip_select = 0, /* Framework chip select */ .chip_select = 0, /* Framework chip select */
.platform_data = NULL; /* No spi_driver specific config */ .platform_data = NULL; /* No spi_driver specific config */
.controller_data = &cs8415a_chip_info, /* Master chip config */ .controller_data = &cs8415a_chip_info, /* Host controller config */
.irq = STREETRACER_APCI_IRQ, /* Slave device interrupt */ .irq = STREETRACER_APCI_IRQ, /* Peripheral device interrupt */
}, },
{ {
.modalias = "cs8405a", /* Name of spi_driver for this device */ .modalias = "cs8405a", /* Name of spi_driver for this device */
.max_speed_hz = 3686400, /* Run SSP as fast a possible */ .max_speed_hz = 3686400, /* Run SSP as fast a possible */
.bus_num = 2, /* Framework bus number */ .bus_num = 2, /* Framework bus number */
.chip_select = 1, /* Framework chip select */ .chip_select = 1, /* Framework chip select */
.controller_data = &cs8405a_chip_info, /* Master chip config */ .controller_data = &cs8405a_chip_info, /* Host controller config */
.irq = STREETRACER_APCI_IRQ, /* Slave device interrupt */ .irq = STREETRACER_APCI_IRQ, /* Peripheral device interrupt */
}, },
}; };