clk: tegra: Fix 26 MHz oscillator frequency

The OSC_FREQ field of the OSC_CTRL register uses the value 12 for an
oscillator frequency of 26 MHz, not 260 MHz. This isn't really critical
because I don't think boards with such an oscillator have ever existed,
much less been supported upstream.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2015-11-18 13:23:46 +01:00
parent 1d15cb9ce9
commit c4947e364b
3 changed files with 3 additions and 3 deletions

View File

@ -625,7 +625,7 @@ static unsigned long tegra114_input_freq[] = {
[5] = 38400000,
[8] = 12000000,
[9] = 48000000,
[12] = 260000000,
[12] = 26000000,
};
#define MASK(x) (BIT(x) - 1)

View File

@ -156,7 +156,7 @@ static unsigned long tegra124_input_freq[] = {
[5] = 38400000,
[8] = 12000000,
[9] = 48000000,
[12] = 260000000,
[12] = 26000000,
};
static struct div_nmp pllxc_nmp = {

View File

@ -583,7 +583,7 @@ static unsigned long tegra30_input_freq[] = {
[5] = 38400000,
[8] = 12000000,
[9] = 48000000,
[12] = 260000000,
[12] = 26000000,
};
static struct tegra_devclk devclks[] __initdata = {