ARM: Provide one-byte cmpxchg emulation

This series provides emulated one-byte cmpxchg() support for ARM
 using the cmpxchg_emu_u8() function that uses a four-byte cmpxchg()
 to emulate the one-byte variant.
 
 Similar patches for emulation of one-byte cmpxchg() for arc, sh, and
 xtensa have not yet received maintainer acks, so they are slated for
 the v6.12 merge window.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCgAxFiEEbK7UrM+RBIrCoViJnr8S83LZ+4wFAmaRtqcTHHBhdWxtY2tA
 a2VybmVsLm9yZwAKCRCevxLzctn7jNvAD/0WF6kmx5aQhom6/lcpM76ZWHG+n6VZ
 pYYkdnqCf43Z4qayJOd1PZxSF7T1H0+TS/NjdIlZSyRqDF4wJNo8Iotp5cudQ94L
 Pn08UYhw9FgUf3uee/a5FVKInLJ3BDEfZs/tHLy2nQKMse3EIuwD0LL9qh/+WEKY
 INjhcVqOkWvNQ7RqMj46rpAQTcjGw9LWB4UVzg9HhYc+YQYQGjhlv29/xU6/14GH
 ZuhkkMi5WvC6ZEAxEOXm9N3DVtOU/UrBENPt1alfEwifOprbysGf3825DoJpqm/z
 kTg0iy3LofYxLvj4cMeH731WKUMaUMErt4+XUQaWsa33qO6Ezj7FGKYjX2UoleS+
 gWktHryvSFEQUH4SNTyYg4yKJYdtP7ynXTKk98EOEMoED4f5UBlBiVQduo7xuwSz
 A5CI4ZT89wOKtAWTQyMEXV9gQnrJLPe7lVbvn+I7x4XFxTYf1y5pvyv6KhlXKXXG
 +N+9c6ixkmBjrCzlWF7DeJfhr+rPjcVznzqNus2e4yyKy7vpTXlD3+vYjIgFgsrM
 +QOfDUZ3nuboPvLNJrOiIRVrZTjllRDODDkK+3kmGIivDKsrh5v36/rBcPO38RPS
 OttgIRfjkBcMsYKcsvtrsbPEwC+Z3vtoZXsT/Qf9Ok4pK1zy0bhEqW8ntHY9hePx
 NUwnK6bMqcH84A==
 =erj9
 -----END PGP SIGNATURE-----

Merge tag 'cmpxchg.2024.07.12a' of git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu

Pull arm byte cmpxchg from Paul McKenney:
 "ARM: Provide one-byte cmpxchg emulation

  This provides emulated one-byte cmpxchg() support for ARM using the
  cmpxchg_emu_u8() function that uses a four-byte cmpxchg() to emulate
  the one-byte variant.

  Similar patches for emulation of one-byte cmpxchg() for arc, sh, and
  xtensa have not yet received maintainer acks, so they are slated for
  the v6.12 merge window"

* tag 'cmpxchg.2024.07.12a' of git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu:
  ARM: Emulate one-byte cmpxchg
This commit is contained in:
Linus Torvalds 2024-07-15 15:19:36 -07:00
commit c4b729b0fa
2 changed files with 7 additions and 1 deletions

View File

@ -34,6 +34,7 @@ config ARM
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
select ARCH_SUPPORTS_ATOMIC_RMW
select ARCH_SUPPORTS_CFI_CLANG
select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE

View File

@ -5,6 +5,7 @@
#include <linux/irqflags.h>
#include <linux/prefetch.h>
#include <asm/barrier.h>
#include <linux/cmpxchg-emu.h>
#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
/*
@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
prefetchw((const void *)ptr);
switch (size) {
#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
#ifdef CONFIG_CPU_V6 /* ARCH == ARMv6 */
case 1:
oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
break;
#else /* min ARCH > ARMv6 */
case 1:
do {
asm volatile("@ __cmpxchg1\n"