drm/i915/clflush: disallow on discrete
We seem to have an unfortunate issue where we arrive from: i915_gem_object_flush_if_display+0x86/0xd0 [i915] intel_user_framebuffer_dirty+0x1a/0x50 [i915] drm_mode_dirtyfb_ioctl+0xfb/0x1b0 which can be before the pages are populated(and pinned for display), and so i915_gem_object_has_struct_page() might still return true, as per the ttm backend. We could re-order the later get_pages() call here, but since on discrete everything should already be coherent, with the exception of the display engine, and even there display surfaces must be allocated in device local-memory anyway, so there should in theory be no conceivable reason to ever call i915_gem_clflush_object() on discrete. References: https://gitlab.freedesktop.org/drm/intel/-/issues/4320 Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211027161813.3094681-2-matthew.auld@intel.com
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@ -69,6 +69,7 @@ static struct clflush *clflush_work_create(struct drm_i915_gem_object *obj)
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bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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unsigned int flags)
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{
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struct drm_i915_private *i915 = to_i915(obj->base.dev);
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struct clflush *clflush;
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assert_object_held(obj);
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@ -80,7 +81,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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* anything not backed by physical memory we consider to be always
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* coherent and not need clflushing.
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*/
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if (!i915_gem_object_has_struct_page(obj)) {
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if (!i915_gem_object_has_struct_page(obj) || IS_DGFX(i915)) {
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obj->cache_dirty = false;
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return false;
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}
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@ -105,7 +106,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
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if (clflush) {
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i915_sw_fence_await_reservation(&clflush->base.chain,
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obj->base.resv, NULL, true,
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i915_fence_timeout(to_i915(obj->base.dev)),
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i915_fence_timeout(i915),
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I915_FENCE_GFP);
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dma_resv_add_excl_fence(obj->base.resv, &clflush->base.dma);
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dma_fence_work_commit(&clflush->base);
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