ASoC: SOF: Intel: ICL: move ICL-specific ops to icl.c
Move the ICL specific ops to icl.c. Also introduce a macro ICL_DSP_HPRO_CORE_ID to define the core that should be powered up when HPRO is enabled. Reviewed-by: Bard Liao <bard.liao@intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20211207193947.71080-2-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -481,49 +481,6 @@ int hda_dsp_post_fw_run(struct snd_sof_dev *sdev)
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return hda_dsp_ctrl_clock_power_gating(sdev, true);
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}
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/*
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* post fw run operations for ICL,
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* Core 3 will be powered up and in stall when HPRO is enabled
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*/
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int hda_dsp_post_fw_run_icl(struct snd_sof_dev *sdev)
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{
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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int ret;
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if (sdev->first_boot) {
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ret = hda_sdw_startup(sdev);
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if (ret < 0) {
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dev_err(sdev->dev,
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"error: could not startup SoundWire links\n");
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return ret;
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}
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}
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hda_sdw_int_enable(sdev, true);
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/*
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* The recommended HW programming sequence for ICL is to
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* power up core 3 and keep it in stall if HPRO is enabled.
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* Major difference between ICL and TGL, on ICL core 3 is managed by
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* the host whereas on TGL it is handled by the firmware.
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*/
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if (!hda->clk_config_lpro) {
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ret = hda_dsp_enable_core(sdev, BIT(3));
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if (ret < 0) {
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dev_err(sdev->dev, "error: dsp core power up failed on core 3\n");
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return ret;
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}
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sdev->enabled_cores_mask |= BIT(3);
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sdev->dsp_core_ref_count[3]++;
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snd_sof_dsp_stall(sdev, BIT(3));
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}
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/* re-enable clock gating and power gating */
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return hda_dsp_ctrl_clock_power_gating(sdev, true);
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}
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int hda_dsp_ext_man_get_cavs_config_data(struct snd_sof_dev *sdev,
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const struct sof_ext_man_elem_header *hdr)
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{
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@ -561,24 +518,3 @@ int hda_dsp_ext_man_get_cavs_config_data(struct snd_sof_dev *sdev,
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return 0;
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}
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int hda_dsp_core_stall_icl(struct snd_sof_dev *sdev, unsigned int core_mask)
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{
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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const struct sof_intel_dsp_desc *chip = hda->desc;
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/* make sure core_mask in host managed cores */
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core_mask &= chip->host_managed_cores_mask;
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if (!core_mask) {
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dev_err(sdev->dev, "error: core_mask is not in host managed cores\n");
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return -EINVAL;
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}
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/* stall core */
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snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR,
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HDA_DSP_REG_ADSPCS,
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HDA_DSP_ADSPCS_CSTALL_MASK(core_mask),
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HDA_DSP_ADSPCS_CSTALL_MASK(core_mask));
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return 0;
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}
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@ -618,8 +618,6 @@ int hda_dsp_cl_boot_firmware_iccmax(struct snd_sof_dev *sdev);
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/* pre and post fw run ops */
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int hda_dsp_pre_fw_run(struct snd_sof_dev *sdev);
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int hda_dsp_post_fw_run(struct snd_sof_dev *sdev);
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int hda_dsp_post_fw_run_icl(struct snd_sof_dev *sdev);
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int hda_dsp_core_stall_icl(struct snd_sof_dev *sdev, unsigned int core_mask);
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/* parse platform specific ext manifest ops */
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int hda_dsp_ext_man_get_cavs_config_data(struct snd_sof_dev *sdev,
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@ -18,12 +18,75 @@
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#include "hda-ipc.h"
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#include "../sof-audio.h"
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#define ICL_DSP_HPRO_CORE_ID 3
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static const struct snd_sof_debugfs_map icl_dsp_debugfs[] = {
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{"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
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{"pp", HDA_DSP_PP_BAR, 0, 0x1000, SOF_DEBUGFS_ACCESS_ALWAYS},
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{"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
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};
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static int icl_dsp_core_stall(struct snd_sof_dev *sdev, unsigned int core_mask)
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{
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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const struct sof_intel_dsp_desc *chip = hda->desc;
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/* make sure core_mask in host managed cores */
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core_mask &= chip->host_managed_cores_mask;
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if (!core_mask) {
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dev_err(sdev->dev, "error: core_mask is not in host managed cores\n");
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return -EINVAL;
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}
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/* stall core */
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snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPCS,
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HDA_DSP_ADSPCS_CSTALL_MASK(core_mask),
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HDA_DSP_ADSPCS_CSTALL_MASK(core_mask));
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return 0;
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}
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/*
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* post fw run operation for ICL.
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* Core 3 will be powered up and in stall when HPRO is enabled
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*/
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static int icl_dsp_post_fw_run(struct snd_sof_dev *sdev)
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{
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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int ret;
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if (sdev->first_boot) {
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ret = hda_sdw_startup(sdev);
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if (ret < 0) {
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dev_err(sdev->dev, "error: could not startup SoundWire links\n");
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return ret;
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}
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}
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hda_sdw_int_enable(sdev, true);
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/*
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* The recommended HW programming sequence for ICL is to
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* power up core 3 and keep it in stall if HPRO is enabled.
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*/
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if (!hda->clk_config_lpro) {
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ret = hda_dsp_enable_core(sdev, BIT(ICL_DSP_HPRO_CORE_ID));
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if (ret < 0) {
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dev_err(sdev->dev, "error: dsp core power up failed on core %d\n",
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ICL_DSP_HPRO_CORE_ID);
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return ret;
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}
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sdev->enabled_cores_mask |= BIT(ICL_DSP_HPRO_CORE_ID);
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sdev->dsp_core_ref_count[ICL_DSP_HPRO_CORE_ID]++;
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snd_sof_dsp_stall(sdev, BIT(ICL_DSP_HPRO_CORE_ID));
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}
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/* re-enable clock gating and power gating */
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return hda_dsp_ctrl_clock_power_gating(sdev, true);
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}
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/* Icelake ops */
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const struct snd_sof_dsp_ops sof_icl_ops = {
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/* probe/remove/shutdown */
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@ -93,7 +156,7 @@ const struct snd_sof_dsp_ops sof_icl_ops = {
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/* pre/post fw run */
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.pre_fw_run = hda_dsp_pre_fw_run,
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.post_fw_run = hda_dsp_post_fw_run_icl,
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.post_fw_run = icl_dsp_post_fw_run,
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/* parse platform specific extended manifest */
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.parse_platform_ext_manifest = hda_dsp_ext_man_get_cavs_config_data,
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@ -103,7 +166,7 @@ const struct snd_sof_dsp_ops sof_icl_ops = {
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/* firmware run */
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.run = hda_dsp_cl_boot_firmware_iccmax,
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.stall = hda_dsp_core_stall_icl,
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.stall = icl_dsp_core_stall,
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/* trace callback */
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.trace_init = hda_dsp_trace_init,
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