tty/serial: Add RISC-V SBI debug console based earlycon

We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/r/20231124070905.1043092-4-apatel@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Anup Patel 2023-11-24 12:39:03 +05:30 committed by Palmer Dabbelt
parent f43fabf444
commit c77bf3607a
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2 changed files with 25 additions and 4 deletions

View File

@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
depends on RISCV_SBI_V01
depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON

View File

@ -15,17 +15,38 @@ static void sbi_putc(struct uart_port *port, unsigned char c)
sbi_console_putchar(c);
}
static void sbi_console_write(struct console *con,
const char *s, unsigned n)
static void sbi_0_1_console_write(struct console *con,
const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}
static void sbi_dbcn_console_write(struct console *con,
const char *s, unsigned int n)
{
int ret;
while (n) {
ret = sbi_debug_console_write(s, n);
if (ret < 0)
break;
s += ret;
n -= ret;
}
}
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
device->con->write = sbi_console_write;
if (sbi_debug_console_available)
device->con->write = sbi_dbcn_console_write;
else if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
device->con->write = sbi_0_1_console_write;
else
return -ENODEV;
return 0;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);