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drm/i915/dp: Account for channel coding efficiency on UHBR links

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Apply the correct BW allocation overhead and channel coding efficiency
on UHBR link rates, similarly to DP1.4 link rates.

Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231116131841.1588781-6-imre.deak@intel.com
This commit is contained in:
Imre Deak 2023-11-16 15:18:35 +02:00
parent 3c460872d2
commit c7ae0978f7
1 changed files with 0 additions and 10 deletions
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10
drivers/gpu/drm/i915/display/intel_display.c
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@ -2397,16 +2397,6 @@ add_bw_alloc_overhead(int link_clock, int bw_overhead,
int ch_coding_efficiency = int ch_coding_efficiency =
drm_dp_bw_channel_coding_efficiency(is_uhbr); drm_dp_bw_channel_coding_efficiency(is_uhbr);
/*
* TODO: adjust for actual UHBR channel coding efficiency and BW
* overhead.
*/
if (is_uhbr) {
*data_m = pixel_data_rate;
*data_n = link_data_rate * 8 / 10;
return;
}
*data_m = DIV_ROUND_UP_ULL(mul_u32_u32(pixel_data_rate, bw_overhead), *data_m = DIV_ROUND_UP_ULL(mul_u32_u32(pixel_data_rate, bw_overhead),
1000000); 1000000);
*data_n = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_data_rate, ch_coding_efficiency), *data_n = DIV_ROUND_DOWN_ULL(mul_u32_u32(link_data_rate, ch_coding_efficiency),