perf/x86/amd/core: Update and fix stalled-cycles-* events for Zen 2 and later
AMD processors based on Zen 2 and later microarchitectures do not
support PMCx087 (instruction pipe stalls) which is used as the backing
event for "stalled-cycles-frontend" and "stalled-cycles-backend".
Use PMCx0A9 (cycles where micro-op queue is empty) instead to count
frontend stalls and remove the entry for backend stalls since there
is no direct replacement.
Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Ian Rogers <irogers@google.com>
Fixes: 3fe3331bb2
("perf/x86/amd: Add event map for AMD Family 17h")
Link: https://lore.kernel.org/r/03d7fc8fa2a28f9be732116009025bdec1b3ec97.1711352180.git.sandipan.das@amd.com
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@ -250,7 +250,7 @@ static const u64 amd_perfmon_event_map[PERF_COUNT_HW_MAX] =
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/*
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* AMD Performance Monitor Family 17h and later:
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*/
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static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] =
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static const u64 amd_zen1_perfmon_event_map[PERF_COUNT_HW_MAX] =
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{
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[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
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[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
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@ -262,10 +262,24 @@ static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] =
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[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x0187,
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};
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static const u64 amd_zen2_perfmon_event_map[PERF_COUNT_HW_MAX] =
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{
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[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
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[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
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[PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60,
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[PERF_COUNT_HW_CACHE_MISSES] = 0x0964,
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[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
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[PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
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[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
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};
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static u64 amd_pmu_event_map(int hw_event)
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{
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if (boot_cpu_data.x86 >= 0x17)
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return amd_f17h_perfmon_event_map[hw_event];
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if (cpu_feature_enabled(X86_FEATURE_ZEN2) || boot_cpu_data.x86 >= 0x19)
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return amd_zen2_perfmon_event_map[hw_event];
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if (cpu_feature_enabled(X86_FEATURE_ZEN1))
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return amd_zen1_perfmon_event_map[hw_event];
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return amd_perfmon_event_map[hw_event];
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}
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