ARM: dts: imx6ull-tarragon: Reduce SPI clock for QCA7000

Our hardware department recently informed us that, according to
the specification, the QCA7000 should be operated with a
maximum SPI clock frequency of 12 MHz. Even if it appears to work
at a higher frequency, we should not take any risks here. A short
performance test showed no measurable loss of speed.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Stefan Wahren 2024-04-16 21:06:59 +02:00 committed by Shawn Guo
parent 8f610681b3
commit c834a78476
3 changed files with 4 additions and 4 deletions

View File

@ -45,7 +45,7 @@
interrupts = <19 IRQ_TYPE_EDGE_RISING>;
spi-cpha;
spi-cpol;
spi-max-frequency = <16000000>;
spi-max-frequency = <12000000>;
};
};
@ -63,7 +63,7 @@
interrupts = <9 IRQ_TYPE_EDGE_RISING>;
spi-cpha;
spi-cpol;
spi-max-frequency = <16000000>;
spi-max-frequency = <12000000>;
};
};

View File

@ -23,7 +23,7 @@
interrupts = <19 IRQ_TYPE_EDGE_RISING>;
spi-cpha;
spi-cpol;
spi-max-frequency = <16000000>;
spi-max-frequency = <12000000>;
};
};

View File

@ -45,7 +45,7 @@
interrupts = <19 IRQ_TYPE_EDGE_RISING>;
spi-cpha;
spi-cpol;
spi-max-frequency = <16000000>;
spi-max-frequency = <12000000>;
};
};