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MIPS: c-r4k: Call R4600_HIT_CACHEOP_WAR_IMPL only for 32 byte cache lines.

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R4600_HIT_CACHEOP_WAR_IMPL is only needed on R4600 v1.6 and the R4600 has
data cache lines that are always 32 bytes so the call is pointless in
r4k_blast_dcache_page_dc64.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2014-05-22 09:55:02 +02:00
parent 70e4c234aa
commit c836732fa0
1 changed files with 0 additions and 1 deletions
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arch/mips/mm/c-r4k.c
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@ -105,7 +105,6 @@ static inline void r4k_blast_dcache_page_dc32(unsigned long addr)
static inline void r4k_blast_dcache_page_dc64(unsigned long addr)
{
R4600_HIT_CACHEOP_WAR_IMPL;
blast_dcache64_page(addr);
}