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drm/nouveau/gr/gm200: modify the mask when copying mmu settings from fb

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Appears to more closely match what RM does.

For GM20B, now also copying bit 12 from NV_PFB_MMU_CTRL as upcoming
changes will require it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2016-04-14 14:41:52 +10:00
parent 54aa38a8ad
commit c83e7d6836
2 changed files with 2 additions and 4 deletions
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4
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
View File

@ -36,10 +36,8 @@ static void
gm200_gr_init_gpc_mmu(struct gf100_gr *gr) gm200_gr_init_gpc_mmu(struct gf100_gr *gr)
{ {
struct nvkm_device *device = gr->base.engine.subdev.device; struct nvkm_device *device = gr->base.engine.subdev.device;
u32 tmp;
tmp = nvkm_rd32(device, 0x100c80); /*XXX: mask? */ nvkm_wr32(device, 0x418880, nvkm_rd32(device, 0x100c80) & 0xf0001fff);
nvkm_wr32(device, 0x418880, 0x00001000 | (tmp & 0x00000fff));
nvkm_wr32(device, 0x418890, 0x00000000); nvkm_wr32(device, 0x418890, 0x00000000);
nvkm_wr32(device, 0x418894, 0x00000000); nvkm_wr32(device, 0x418894, 0x00000000);

2
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c
View File

@ -42,7 +42,7 @@ gm20b_gr_init_gpc_mmu(struct gf100_gr *gr)
} }
val = nvkm_rd32(device, 0x100c80); val = nvkm_rd32(device, 0x100c80);
val &= 0xf000087f; val &= 0xf000187f;
nvkm_wr32(device, 0x418880, val); nvkm_wr32(device, 0x418880, val);
nvkm_wr32(device, 0x418890, 0); nvkm_wr32(device, 0x418890, 0);
nvkm_wr32(device, 0x418894, 0); nvkm_wr32(device, 0x418894, 0);