Merge branch 'phy-warn'
Andrew Lunn says: ==================== drivers/net/phy C=1 W=1 fixes This fixes most of the Sparse and W=1 warnings in drivers/net/phy. The Cavium code is still not fully clean, but it might actually be the strange code is confusing Sparse. v2 -- Added RB, TB, AB. s/case/cause Reverse Christmas tree Module soft dependencies ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
c8658e5841
@ -961,7 +961,7 @@ static int octeon_mgmt_init_phy(struct net_device *netdev)
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PHY_INTERFACE_MODE_MII);
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PHY_INTERFACE_MODE_MII);
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if (!phydev)
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if (!phydev)
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return -ENODEV;
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return -EPROBE_DEFER;
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return 0;
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return 0;
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}
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}
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@ -1554,12 +1554,8 @@ static struct platform_driver octeon_mgmt_driver = {
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.remove = octeon_mgmt_remove,
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.remove = octeon_mgmt_remove,
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};
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};
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extern void octeon_mdiobus_force_mod_depencency(void);
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static int __init octeon_mgmt_mod_init(void)
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static int __init octeon_mgmt_mod_init(void)
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{
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{
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/* Force our mdiobus driver module to be loaded first. */
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octeon_mdiobus_force_mod_depencency();
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return platform_driver_register(&octeon_mgmt_driver);
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return platform_driver_register(&octeon_mgmt_driver);
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}
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}
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@ -1571,6 +1567,7 @@ static void __exit octeon_mgmt_mod_exit(void)
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module_init(octeon_mgmt_mod_init);
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module_init(octeon_mgmt_mod_init);
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module_exit(octeon_mgmt_mod_exit);
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module_exit(octeon_mgmt_mod_exit);
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MODULE_SOFTDEP("pre: mdio-cavium");
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MODULE_DESCRIPTION(DRV_DESCRIPTION);
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MODULE_DESCRIPTION(DRV_DESCRIPTION);
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MODULE_AUTHOR("David Daney");
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MODULE_AUTHOR("David Daney");
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MODULE_LICENSE("GPL");
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MODULE_LICENSE("GPL");
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@ -106,8 +106,8 @@
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/**
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/**
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* struct adin_cfg_reg_map - map a config value to aregister value
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* struct adin_cfg_reg_map - map a config value to aregister value
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* @cfg value in device configuration
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* @cfg: value in device configuration
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* @reg value in the register
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* @reg: value in the register
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*/
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*/
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struct adin_cfg_reg_map {
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struct adin_cfg_reg_map {
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int cfg;
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int cfg;
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@ -135,9 +135,9 @@ static const struct adin_cfg_reg_map adin_rmii_fifo_depths[] = {
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/**
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/**
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* struct adin_clause45_mmd_map - map to convert Clause 45 regs to Clause 22
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* struct adin_clause45_mmd_map - map to convert Clause 45 regs to Clause 22
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* @devad device address used in Clause 45 access
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* @devad: device address used in Clause 45 access
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* @cl45_regnum register address defined by Clause 45
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* @cl45_regnum: register address defined by Clause 45
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* @adin_regnum equivalent register address accessible via Clause 22
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* @adin_regnum: equivalent register address accessible via Clause 22
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*/
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*/
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struct adin_clause45_mmd_map {
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struct adin_clause45_mmd_map {
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int devad;
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int devad;
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@ -174,7 +174,7 @@ static const struct adin_hw_stat adin_hw_stats[] = {
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/**
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/**
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* struct adin_priv - ADIN PHY driver private data
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* struct adin_priv - ADIN PHY driver private data
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* stats statistic counters for the PHY
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* @stats: statistic counters for the PHY
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*/
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*/
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struct adin_priv {
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struct adin_priv {
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u64 stats[ARRAY_SIZE(adin_hw_stats)];
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u64 stats[ARRAY_SIZE(adin_hw_stats)];
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@ -400,8 +400,8 @@ static int at803x_parse_dt(struct phy_device *phydev)
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{
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{
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struct device_node *node = phydev->mdio.dev.of_node;
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struct device_node *node = phydev->mdio.dev.of_node;
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struct at803x_priv *priv = phydev->priv;
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struct at803x_priv *priv = phydev->priv;
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unsigned int sel, mask;
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u32 freq, strength;
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u32 freq, strength;
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unsigned int sel;
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int ret;
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int ret;
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if (!IS_ENABLED(CONFIG_OF_MDIO))
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if (!IS_ENABLED(CONFIG_OF_MDIO))
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@ -409,7 +409,6 @@ static int at803x_parse_dt(struct phy_device *phydev)
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ret = of_property_read_u32(node, "qca,clk-out-frequency", &freq);
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ret = of_property_read_u32(node, "qca,clk-out-frequency", &freq);
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if (!ret) {
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if (!ret) {
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mask = AT803X_CLK_OUT_MASK;
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switch (freq) {
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switch (freq) {
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case 25000000:
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case 25000000:
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sel = AT803X_CLK_OUT_25MHZ_XTAL;
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sel = AT803X_CLK_OUT_25MHZ_XTAL;
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@ -428,8 +427,8 @@ static int at803x_parse_dt(struct phy_device *phydev)
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return -EINVAL;
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return -EINVAL;
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}
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}
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priv->clk_25m_reg |= FIELD_PREP(mask, sel);
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priv->clk_25m_reg |= FIELD_PREP(AT803X_CLK_OUT_MASK, sel);
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priv->clk_25m_mask |= mask;
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priv->clk_25m_mask |= AT803X_CLK_OUT_MASK;
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/* Fixup for the AR8030/AR8035. This chip has another mask and
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/* Fixup for the AR8030/AR8035. This chip has another mask and
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* doesn't support the DSP reference. Eg. the lowest bit of the
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* doesn't support the DSP reference. Eg. the lowest bit of the
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@ -803,9 +803,10 @@ static int decode_evnt(struct dp83640_private *dp83640,
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static int match(struct sk_buff *skb, unsigned int type, struct rxts *rxts)
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static int match(struct sk_buff *skb, unsigned int type, struct rxts *rxts)
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{
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{
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u16 *seqid, hash;
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unsigned int offset = 0;
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unsigned int offset = 0;
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u8 *msgtype, *data = skb_mac_header(skb);
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u8 *msgtype, *data = skb_mac_header(skb);
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__be16 *seqid;
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u16 hash;
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/* check sequenceID, messageType, 12 bit hash of offset 20-29 */
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/* check sequenceID, messageType, 12 bit hash of offset 20-29 */
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@ -836,7 +837,7 @@ static int match(struct sk_buff *skb, unsigned int type, struct rxts *rxts)
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if (rxts->msgtype != (*msgtype & 0xf))
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if (rxts->msgtype != (*msgtype & 0xf))
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return 0;
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return 0;
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seqid = (u16 *)(data + offset + OFF_PTP_SEQUENCE_ID);
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seqid = (__be16 *)(data + offset + OFF_PTP_SEQUENCE_ID);
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if (rxts->seqid != ntohs(*seqid))
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if (rxts->seqid != ntohs(*seqid))
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return 0;
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return 0;
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@ -17,7 +17,8 @@ static DEFINE_MUTEX(mdio_board_lock);
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/**
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/**
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* mdiobus_setup_mdiodev_from_board_info - create and setup MDIO devices
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* mdiobus_setup_mdiodev_from_board_info - create and setup MDIO devices
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* from pre-collected board specific MDIO information
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* from pre-collected board specific MDIO information
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* @mdiodev: MDIO device pointer
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* @bus: Bus the board_info belongs to
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* @cb: Callback to create device on bus
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* Context: can sleep
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* Context: can sleep
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*/
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*/
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void mdiobus_setup_mdiodev_from_board_info(struct mii_bus *bus,
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void mdiobus_setup_mdiodev_from_board_info(struct mii_bus *bus,
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@ -90,7 +90,7 @@ union cvmx_smix_wr_dat {
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struct cavium_mdiobus {
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struct cavium_mdiobus {
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struct mii_bus *mii_bus;
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struct mii_bus *mii_bus;
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u64 register_base;
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void __iomem *register_base;
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enum cavium_mdiobus_mode mode;
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enum cavium_mdiobus_mode mode;
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};
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};
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@ -98,20 +98,20 @@ struct cavium_mdiobus {
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#include <asm/octeon/octeon.h>
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#include <asm/octeon/octeon.h>
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static inline void oct_mdio_writeq(u64 val, u64 addr)
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static inline void oct_mdio_writeq(u64 val, void __iomem *addr)
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{
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{
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cvmx_write_csr(addr, val);
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cvmx_write_csr((u64 __force)addr, val);
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}
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}
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static inline u64 oct_mdio_readq(u64 addr)
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static inline u64 oct_mdio_readq(void __iomem *addr)
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{
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{
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return cvmx_read_csr(addr);
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return cvmx_read_csr((u64 __force)addr);
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}
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}
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#else
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#else
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#include <linux/io-64-nonatomic-lo-hi.h>
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#include <linux/io-64-nonatomic-lo-hi.h>
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#define oct_mdio_writeq(val, addr) writeq(val, (void *)addr)
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#define oct_mdio_writeq(val, addr) writeq(val, addr)
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#define oct_mdio_readq(addr) readq((void *)addr)
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#define oct_mdio_readq(addr) readq(addr)
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#endif
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#endif
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int cavium_mdiobus_read(struct mii_bus *bus, int phy_id, int regnum);
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int cavium_mdiobus_read(struct mii_bus *bus, int phy_id, int regnum);
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@ -44,8 +44,7 @@ static int octeon_mdiobus_probe(struct platform_device *pdev)
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return -ENXIO;
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return -ENXIO;
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}
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}
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bus->register_base =
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bus->register_base = devm_ioremap(&pdev->dev, mdio_phys, regsize);
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(u64)devm_ioremap(&pdev->dev, mdio_phys, regsize);
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if (!bus->register_base) {
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if (!bus->register_base) {
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dev_err(&pdev->dev, "dev_ioremap failed\n");
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dev_err(&pdev->dev, "dev_ioremap failed\n");
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return -ENOMEM;
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return -ENOMEM;
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@ -56,7 +55,7 @@ static int octeon_mdiobus_probe(struct platform_device *pdev)
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oct_mdio_writeq(smi_en.u64, bus->register_base + SMI_EN);
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oct_mdio_writeq(smi_en.u64, bus->register_base + SMI_EN);
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bus->mii_bus->name = KBUILD_MODNAME;
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bus->mii_bus->name = KBUILD_MODNAME;
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snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%llx", bus->register_base);
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snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%px", bus->register_base);
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bus->mii_bus->parent = &pdev->dev;
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bus->mii_bus->parent = &pdev->dev;
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bus->mii_bus->read = cavium_mdiobus_read;
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bus->mii_bus->read = cavium_mdiobus_read;
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@ -109,12 +108,6 @@ static struct platform_driver octeon_mdiobus_driver = {
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.remove = octeon_mdiobus_remove,
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.remove = octeon_mdiobus_remove,
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};
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};
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void octeon_mdiobus_force_mod_depencency(void)
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{
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/* Let ethernet drivers force us to be loaded. */
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}
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EXPORT_SYMBOL(octeon_mdiobus_force_mod_depencency);
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module_platform_driver(octeon_mdiobus_driver);
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module_platform_driver(octeon_mdiobus_driver);
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MODULE_DESCRIPTION("Cavium OCTEON MDIO bus driver");
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MODULE_DESCRIPTION("Cavium OCTEON MDIO bus driver");
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@ -84,7 +84,7 @@ static int thunder_mdiobus_pci_probe(struct pci_dev *pdev,
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nexus->buses[i] = bus;
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nexus->buses[i] = bus;
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i++;
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i++;
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bus->register_base = (u64)nexus->bar0 +
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bus->register_base = nexus->bar0 +
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r.start - pci_resource_start(pdev, 0);
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r.start - pci_resource_start(pdev, 0);
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smi_en.u64 = 0;
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smi_en.u64 = 0;
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@ -181,7 +181,7 @@ static int mdio_remove(struct device *dev)
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/**
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/**
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* mdio_driver_register - register an mdio_driver with the MDIO layer
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* mdio_driver_register - register an mdio_driver with the MDIO layer
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* @new_driver: new mdio_driver to register
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* @drv: new mdio_driver to register
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*/
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*/
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int mdio_driver_register(struct mdio_driver *drv)
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int mdio_driver_register(struct mdio_driver *drv)
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{
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{
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@ -106,10 +106,9 @@ const int phy_10gbit_features_array[1] = {
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};
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};
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EXPORT_SYMBOL_GPL(phy_10gbit_features_array);
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EXPORT_SYMBOL_GPL(phy_10gbit_features_array);
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const int phy_10gbit_fec_features_array[1] = {
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static const int phy_10gbit_fec_features_array[1] = {
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ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
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ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
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};
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};
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EXPORT_SYMBOL_GPL(phy_10gbit_fec_features_array);
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__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
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__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
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EXPORT_SYMBOL_GPL(phy_10gbit_full_features);
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EXPORT_SYMBOL_GPL(phy_10gbit_full_features);
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@ -227,7 +226,6 @@ static void phy_mdio_device_remove(struct mdio_device *mdiodev)
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}
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}
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static struct phy_driver genphy_driver;
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static struct phy_driver genphy_driver;
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extern struct phy_driver genphy_c45_driver;
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static LIST_HEAD(phy_fixup_list);
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static LIST_HEAD(phy_fixup_list);
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static DEFINE_MUTEX(phy_fixup_lock);
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static DEFINE_MUTEX(phy_fixup_lock);
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@ -163,7 +163,7 @@ int cvm_oct_phy_setup_device(struct net_device *dev)
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of_node_put(phy_node);
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of_node_put(phy_node);
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if (!phydev)
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if (!phydev)
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return -ENODEV;
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return -EPROBE_DEFER;
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priv->last_link = 0;
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priv->last_link = 0;
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phy_start(phydev);
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phy_start(phydev);
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@ -22,7 +22,5 @@
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extern const struct ethtool_ops cvm_oct_ethtool_ops;
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extern const struct ethtool_ops cvm_oct_ethtool_ops;
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void octeon_mdiobus_force_mod_depencency(void);
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int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
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int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
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int cvm_oct_phy_setup_device(struct net_device *dev);
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int cvm_oct_phy_setup_device(struct net_device *dev);
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@ -689,8 +689,6 @@ static int cvm_oct_probe(struct platform_device *pdev)
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mtu_overhead += VLAN_HLEN;
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mtu_overhead += VLAN_HLEN;
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#endif
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#endif
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octeon_mdiobus_force_mod_depencency();
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pip = pdev->dev.of_node;
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pip = pdev->dev.of_node;
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if (!pip) {
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if (!pip) {
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pr_err("Error: No 'pip' in /aliases\n");
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pr_err("Error: No 'pip' in /aliases\n");
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@ -987,6 +985,7 @@ static struct platform_driver cvm_oct_driver = {
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module_platform_driver(cvm_oct_driver);
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module_platform_driver(cvm_oct_driver);
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MODULE_SOFTDEP("pre: mdio-cavium");
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MODULE_LICENSE("GPL");
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>");
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MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>");
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MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver.");
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MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver.");
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@ -1385,6 +1385,9 @@ int genphy_c45_pma_read_abilities(struct phy_device *phydev);
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int genphy_c45_read_status(struct phy_device *phydev);
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int genphy_c45_read_status(struct phy_device *phydev);
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int genphy_c45_config_aneg(struct phy_device *phydev);
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int genphy_c45_config_aneg(struct phy_device *phydev);
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/* Generic C45 PHY driver */
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extern struct phy_driver genphy_c45_driver;
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/* The gen10g_* functions are the old Clause 45 stub */
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/* The gen10g_* functions are the old Clause 45 stub */
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int gen10g_config_aneg(struct phy_device *phydev);
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int gen10g_config_aneg(struct phy_device *phydev);
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