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ASPEED device tree updates for 5.15

Browse Source 
- New machines
 
   * Facebook's Cloudripper
   * Facebook's Elbert
   * Facebook's Fuji
 
   All three carry the description of "Facebook's next generation switch
   platform with an AST2600 BMC integrated for health monitoring
   purpose."
 
   They share a 128 MB SPI NOR flash layout that is also used by some
   older platforms.
 
   * Inspur's NF5280M6, an x86 platform server with an AST2500-based BMC
 
  - SGPIO updates including AST2600 support
 
  - GPIO descriptions for the IBM AST2600 machines
 
  - Pinctrl fix
 
  - Updates to Facebook's AST2500 based machines
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Merge tag 'aspeed-5.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt

ASPEED device tree updates for 5.15

 - New machines

  * Facebook's Cloudripper
  * Facebook's Elbert
  * Facebook's Fuji

  All three carry the description of "Facebook's next generation switch
  platform with an AST2600 BMC integrated for health monitoring
  purpose."

  They share a 128 MB SPI NOR flash layout that is also used by some
  older platforms.

  * Inspur's NF5280M6, an x86 platform server with an AST2500-based BMC

 - SGPIO updates including AST2600 support

 - GPIO descriptions for the IBM AST2600 machines

 - Pinctrl fix

 - Updates to Facebook's AST2500 based machines

* tag 'aspeed-5.15-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: (23 commits)
  ARM: dts: aspeed: p10bmc: Add power control pins
  ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
  ARM: dts: aspeed: minipack: Update flash partition table
  ARM: dts: aspeed: Add Facebook Fuji (AST2600) BMC
  ARM: dts: aspeed: Add Facebook Elbert (AST2600) BMC
  ARM: dts: aspeed: Add Facebook Cloudripper (AST2600) BMC
  ARM: dts: aspeed: Common dtsi for Facebook AST2600 Network BMCs
  ARM: dts: aspeed: wedge400: Use common flash layout
  ARM: dts: Add Facebook BMC 128MB flash layout
  ARM: dts: aspeed-g5: Remove ngpios from sgpio node.
  ARM: dts: aspeed-g6: Add SGPIO node.
  dt-bindings: aspeed-sgpio: Add ast2600 sgpio
  dt-bindings: aspeed-sgpio: Convert txt bindings to yaml.
  ARM: dts: aspeed: ast2500evb: Enable built in RTC
  ARM: dts: aspeed: tacoma: Add TPM reset GPIO
  ARM: dts: rainier, everest: Add TPM reset GPIO
  ARM: dts: aspeed: wedge100: Enable ADC channels
  ARM: dts: aspeed: galaxy100: Remove redundant ADC device
  ARM: dts: aspeed: wedge40: Remove redundant ADC device
  ARM: dts: aspeed: Enable ADC in Facebook AST2400 common dtsi
  ...

Link: https://lore.kernel.org/r/CACPK8XdWRBb9cuDWGQPfK8R8TsZuydJQHsL4_e2w=HvCKAMogg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-08-18 14:44:40 +02:00
commit c872138c2c
22 changed files with 3033 additions and 112 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

77
Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml Normal file
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@ -0,0 +1,77 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Aspeed SGPIO controller
maintainers:
- Andrew Jeffery <andrew@aj.id.au>
description:
This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
AST2600 have two sgpio master one with 128 pins another one with 80 pins,
AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
GPIO pins can be programmed to support the following options
- Support interrupt option for each input port and various interrupt
sensitivity option (level-high, level-low, edge-high, edge-low)
- Support reset tolerance option for each output port
- Directly connected to APB bus and its shift clock is from APB bus clock
divided by a programmable value.
- Co-work with external signal-chained TTL components (74LV165/74LV595)
properties:
compatible:
enum:
- aspeed,ast2400-sgpio
- aspeed,ast2500-sgpio
- aspeed,ast2600-sgpiom
reg:
maxItems: 1
gpio-controller: true
'#gpio-cells':
const: 2
interrupts:
maxItems: 1
interrupt-controller: true
clocks:
maxItems: 1
ngpios: true
bus-frequency: true
required:
- compatible
- reg
- gpio-controller
- '#gpio-cells'
- interrupts
- interrupt-controller
- ngpios
- clocks
- bus-frequency
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/aspeed-clock.h>
sgpio: sgpio@1e780200 {
#gpio-cells = <2>;
compatible = "aspeed,ast2500-sgpio";
gpio-controller;
interrupts = <40>;
reg = <0x1e780200 0x0100>;
clocks = <&syscon ASPEED_CLK_APB>;
interrupt-controller;
ngpios = <80>;
bus-frequency = <12000000>;
};

46
Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
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@ -1,46 +0,0 @@
Aspeed SGPIO controller Device Tree Bindings
--------------------------------------------
This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
support the following options:
- Support interrupt option for each input port and various interrupt
sensitivity option (level-high, level-low, edge-high, edge-low)
- Support reset tolerance option for each output port
- Directly connected to APB bus and its shift clock is from APB bus clock
divided by a programmable value.
- Co-work with external signal-chained TTL components (74LV165/74LV595)
Required properties:
- compatible : Should be one of
"aspeed,ast2400-sgpio", "aspeed,ast2500-sgpio"
- #gpio-cells : Should be 2, see gpio.txt
- reg : Address and length of the register set for the device
- gpio-controller : Marks the device node as a GPIO controller
- interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt
- interrupt-controller : Mark the GPIO controller as an interrupt-controller
- ngpios : number of *hardware* GPIO lines, see gpio.txt. This will expose
2 software GPIOs per hardware GPIO: one for hardware input, one for hardware
output. Up to 80 pins, must be a multiple of 8.
- clocks : A phandle to the APB clock for SGPM clock division
- bus-frequency : SGPM CLK frequency
The sgpio and interrupt properties are further described in their respective
bindings documentation:
- Documentation/devicetree/bindings/gpio/gpio.txt
- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
Example:
sgpio: sgpio@1e780200 {
#gpio-cells = <2>;
compatible = "aspeed,ast2500-sgpio";
gpio-controller;
interrupts = <40>;
reg = <0x1e780200 0x0100>;
clocks = <&syscon ASPEED_CLK_APB>;
interrupt-controller;
ngpios = <8>;
bus-frequency = <12000000>;
};

4
arch/arm/boot/dts/Makefile
View File

@ -1462,7 +1462,10 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-asrock-e3c246d4i.dtb \
aspeed-bmc-bytedance-g220a.dtb \
aspeed-bmc-facebook-cloudripper.dtb \
aspeed-bmc-facebook-cmm.dtb \
aspeed-bmc-facebook-elbert.dtb \
aspeed-bmc-facebook-fuji.dtb \
aspeed-bmc-facebook-galaxy100.dtb \
aspeed-bmc-facebook-minipack.dtb \
aspeed-bmc-facebook-tiogapass.dtb \
@ -1477,6 +1480,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-ibm-rainier-4u.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-inspur-nf5280m6.dtb \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-lenovo-hr855xg2.dtb \
aspeed-bmc-microsoft-olympus.dtb \

4
arch/arm/boot/dts/aspeed-ast2500-evb.dts
View File

@ -129,3 +129,7 @@
status = "okay";
memory-region = <&gfx_memory>;
};
&rtc {
status = "okay";
};

544
arch/arm/boot/dts/aspeed-bmc-facebook-cloudripper.dts Normal file
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@ -0,0 +1,544 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2020 Facebook Inc.
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include "ast2600-facebook-netbmc-common.dtsi"
/ {
model = "Facebook Cloudripper BMC";
compatible = "facebook,cloudripper-bmc", "aspeed,ast2600";
aliases {
/*
* PCA9548 (1-0070) provides 8 channels connecting to
* SMB (Switch Main Board).
*/
i2c16 = &imux16;
i2c17 = &imux17;
i2c18 = &imux18;
i2c19 = &imux19;
i2c20 = &imux20;
i2c21 = &imux21;
i2c22 = &imux22;
i2c23 = &imux23;
/*
* PCA9548 (2-0070) provides 8 channels connecting to
* SCM (System Controller Module).
*/
i2c24 = &imux24;
i2c25 = &imux25;
i2c26 = &imux26;
i2c27 = &imux27;
i2c28 = &imux28;
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
/*
* PCA9548 (3-0070) provides 8 channels connecting to
* SMB (Switch Main Board).
*/
i2c32 = &imux32;
i2c33 = &imux33;
i2c34 = &imux34;
i2c35 = &imux35;
i2c36 = &imux36;
i2c37 = &imux37;
i2c38 = &imux38;
i2c39 = &imux39;
/*
* PCA9548 (8-0070) provides 8 channels connecting to
* PDB (Power Delivery Board).
*/
i2c40 = &imux40;
i2c41 = &imux41;
i2c42 = &imux42;
i2c43 = &imux43;
i2c44 = &imux44;
i2c45 = &imux45;
i2c46 = &imux46;
i2c47 = &imux47;
/*
* PCA9548 (15-0076) provides 8 channels connecting to
* FCM (Fan Controller Module).
*/
i2c48 = &imux48;
i2c49 = &imux49;
i2c50 = &imux50;
i2c51 = &imux51;
i2c52 = &imux52;
i2c53 = &imux53;
i2c54 = &imux54;
i2c55 = &imux55;
};
spi_gpio: spi-gpio {
num-chipselects = <2>;
cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>,
<&gpio0 ASPEED_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
eeprom@1 {
compatible = "atmel,at93c46d";
spi-max-frequency = <250000>;
data-size = <16>;
spi-cs-high;
reg = <1>;
};
};
};
&ehci1 {
status = "okay";
};
/*
* "mdio1" is connected to the MDC/MDIO interface of the on-board
* management switch (whose ports are connected to BMC, Host and front
* panel ethernet port).
*/
&mdio1 {
status = "okay";
};
&mdio3 {
status = "okay";
ethphy1: ethernet-phy@13 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0d>;
};
};
&mac3 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&ethphy1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii4_default>;
};
&i2c0 {
multi-master;
bus-frequency = <1000000>;
};
&i2c1 {
/*
* PCA9548 (1-0070) provides 8 channels connecting to SMB (Switch
* Main Board).
*/
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux16: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux17: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux18: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux19: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux20: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux21: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux22: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux23: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c2 {
/*
* PCA9548 (2-0070) provides 8 channels connecting to SCM (System
* Controller Module).
*/
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux28: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux29: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux30: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux31: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c3 {
/*
* PCA9548 (3-0070) provides 8 channels connecting to SMB (Switch
* Main Board).
*/
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux32: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux33: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux34: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux35: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux36: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux37: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux38: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux39: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c6 {
lp5012@14 {
compatible = "ti,lp5012";
reg = <0x14>;
#address-cells = <1>;
#size-cells = <0>;
multi-led@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
color = <LED_COLOR_ID_MULTI>;
function = LED_FUNCTION_ACTIVITY;
label = "sys";
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_BLUE>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
};
};
multi-led@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
color = <LED_COLOR_ID_MULTI>;
function = LED_FUNCTION_ACTIVITY;
label = "fan";
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_BLUE>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
};
};
multi-led@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
color = <LED_COLOR_ID_MULTI>;
function = LED_FUNCTION_ACTIVITY;
label = "psu";
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_BLUE>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
};
};
multi-led@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
color = <LED_COLOR_ID_MULTI>;
function = LED_FUNCTION_ACTIVITY;
label = "scm";
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_BLUE>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
};
};
};
};
&i2c8 {
/*
* PCA9548 (8-0070) provides 8 channels connecting to PDB (Power
* Delivery Board).
*/
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux40: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux41: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux42: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux43: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux44: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux45: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux46: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux47: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c15 {
/*
* PCA9548 (15-0076) provides 8 channels connecting to FCM (Fan
* Controller Module).
*/
i2c-switch@76 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x76>;
i2c-mux-idle-disconnect;
imux48: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux49: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux50: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux51: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux52: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux53: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux54: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux55: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};

185
arch/arm/boot/dts/aspeed-bmc-facebook-elbert.dts Normal file
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@ -0,0 +1,185 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2020 Facebook Inc.
/dts-v1/;
#include "ast2600-facebook-netbmc-common.dtsi"
/ {
model = "Facebook Elbert BMC";
compatible = "facebook,elbert-bmc", "aspeed,ast2600";
aliases {
serial0 = &uart5;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
/*
* 8 child channels of PCA9548 2-0075.
*/
i2c16 = &imux16;
i2c17 = &imux17;
i2c18 = &imux18;
i2c19 = &imux19;
i2c20 = &imux20;
i2c21 = &imux21;
i2c22 = &imux22;
i2c23 = &imux23;
/*
* 8 child channels of PCA9548 5-0075.
*/
i2c24 = &imux24;
i2c25 = &imux25;
i2c26 = &imux26;
i2c27 = &imux27;
i2c28 = &imux28;
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
};
chosen {
stdout-path = &uart5;
};
spi_gpio: spi-gpio {
num-chipselects = <1>;
cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
};
};
&lpc_ctrl {
status = "okay";
};
&kcs2 {
status = "okay";
aspeed,lpc-io-reg = <0xca8>;
};
&kcs3 {
status = "okay";
aspeed,lpc-io-reg = <0xca2>;
};
&i2c2 {
i2c-switch@75 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c-mux-idle-disconnect;
imux16: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux17: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux18: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux19: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux20: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux21: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux22: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux23: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c5 {
i2c-switch@75 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c-mux-idle-disconnect;
imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux28: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux29: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux30: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux31: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c11 {
status = "okay";
};

1251
arch/arm/boot/dts/aspeed-bmc-facebook-fuji.dts Normal file
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File diff suppressed because it is too large Load Diff

4
arch/arm/boot/dts/aspeed-bmc-facebook-galaxy100.dts
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@ -51,7 +51,3 @@
&vhub {
status = "okay";
};
&adc {
status = "okay";
};

8
arch/arm/boot/dts/aspeed-bmc-facebook-minipack.dts
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@ -265,19 +265,19 @@
};
/*
* FIT image: 59.5 MB.
* FIT image: 55.5 MB.
*/
fit@80000 {
reg = <0x80000 0x3b80000>;
reg = <0x80000 0x3780000>;
label = "fit";
};
/*
* "data0" partition (4MB) is reserved for persistent
* "data0" partition (8MB) is reserved for persistent
* data store.
*/
data0@3800000 {
reg = <0x3c00000 0x400000>;
reg = <0x3800000 0x800000>;
label = "data0";
};

5
arch/arm/boot/dts/aspeed-bmc-facebook-wedge100.dts
View File

@ -12,6 +12,11 @@
stdout-path = &uart3;
bootargs = "console=ttyS2,9600n8 root=/dev/ram rw";
};
ast-adc-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>;
};
};
&wdt2 {

4
arch/arm/boot/dts/aspeed-bmc-facebook-wedge40.dts
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@ -23,10 +23,6 @@
status = "disabled";
};
&adc {
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";

48
arch/arm/boot/dts/aspeed-bmc-facebook-wedge400.dts
View File

@ -91,53 +91,7 @@
* Both firmware flashes are 128MB on Wedge400 BMC.
*/
&fmc_flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* u-boot partition: 384KB.
*/
u-boot@0 {
reg = <0x0 0x60000>;
label = "u-boot";
};
/*
* u-boot environment variables: 128KB.
*/
u-boot-env@60000 {
reg = <0x60000 0x20000>;
label = "env";
};
/*
* FIT image: 123.5 MB.
*/
fit@80000 {
reg = <0x80000 0x7b80000>;
label = "fit";
};
/*
* "data0" partition (4MB) is reserved for persistent
* data store.
*/
data0@7c00000 {
reg = <0x7c00000 0x400000>;
label = "data0";
};
/*
* "flash0" partition (covering the entire flash) is
* explicitly created to avoid breaking legacy applications.
*/
flash0@0 {
reg = <0x0 0x8000000>;
label = "flash0";
};
};
#include "facebook-bmc-flash-layout-128.dtsi"
};
&fmc_flash1 {

4
arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
View File

@ -253,7 +253,7 @@
/*O0-O7*/ "","","","","","","","",
/*P0-P7*/ "","","","","led-pcieslot-power","","","",
/*Q0-Q7*/ "","","","","","","","",
/*R0-R7*/ "","","","","","I2C_FLASH_MICRO_N","","",
/*R0-R7*/ "bmc-tpm-reset","power-chassis-control","power-chassis-good","","","I2C_FLASH_MICRO_N","","",
/*S0-S7*/ "","","","","","","","",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
@ -2832,7 +2832,7 @@
&emmc {
status = "okay";
clk-phase-mmc-hs200 = <180>, <180>;
clk-phase-mmc-hs200 = <210>, <228>;
};
&fsim0 {

2
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
View File

@ -271,7 +271,7 @@
/*O0-O7*/ "","","","usb-power","","","","",
/*P0-P7*/ "","","","","pcieslot-power","","","",
/*Q0-Q7*/ "cfam-reset","","","","","","","",
/*R0-R7*/ "","","","","","","","",
/*R0-R7*/ "bmc-tpm-reset","power-chassis-control","power-chassis-good","","","","","",
/*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3",
"","","","",
/*T0-T7*/ "","","","","","","","",

691
arch/arm/boot/dts/aspeed-bmc-inspur-nf5280m6.dts Normal file
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@ -0,0 +1,691 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2021 Inspur Corporation
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "NF5280M6 BMC";
compatible = "inspur,nf5280m6-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlycon";
};
memory@80000000 {
reg = <0x80000000 0x40000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@9f000000 {
no-map;
reg = <0x9f000000 0x01000000>; /* 16M */
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
compatible = "gpio-leds";
bmc_alive {
label = "bmc_alive";
gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
linux,default-trigger = "timer";
led-pattern = <1000 1000>;
};
front-fan {
label = "front-fan";
gpios = <&gpio ASPEED_GPIO(F,2) GPIO_ACTIVE_LOW>;
};
front-psu {
label = "front-psu";
gpios = <&gpio ASPEED_GPIO(F,3) GPIO_ACTIVE_LOW>;
};
front-syshot {
label = "front-syshot";
gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
};
front-memory {
label = "front-memory";
gpios = <&gpio ASPEED_GPIO(S, 7) GPIO_ACTIVE_LOW>;
};
identify {
label = "identify";
gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "bios";
spi-max-frequency = <100000000>;
};
};
&uart1 {
status = "okay";
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&gpio {
status = "okay";
/* Enable GPIOE0 and GPIOE2 pass-through by default */
pinctrl-names = "pass-through";
pinctrl-0 = <&pinctrl_gpie0_default
&pinctrl_gpie2_default>;
gpio-line-names =
/*A0-A7*/ "","MAC2LINK","BMC_RESET_CPLD","","BMC_SCL9","","MAC2MDC_R","",
/*B0-B7*/ "BMC_INIT_OK","FM_SKU_ID2","FM_SPD_DDRCPU_LVLSHFT_DIS_R_N",
"FM_CPU_MSMI_CATERR_LVT3_BMC_N","","FM_CPU0_PROCHOT_LVT3_N",
"FM_CPU_MEM_THERMTRIP_LVT3_N","BIOS_LOAD_DEFAULT_R_N",
/*C0-C7*/ "","","","","","","","",
/*D0-D7*/ "","BMC_SD2CMD","BMC_SD2DAT0","BMC_SD2DAT1","BMC_SD2DAT2",
"BMC_SD2DAT3","BMC_SD2DET","BMC_SD2WPT",
/*E0-E7*/ "FM_BOARD_ID0","FM_BOARD_ID1","FM_BOARD_ID2","FM_BOARD_ID3",
"FM_BOARD_ID4","FM_BOARD_ID5","","",
/*F0-F7*/ "PSU1_PRESENT_N","PSU2_PRESENT_N","FAN_FAULT_LED_N","PSU_FAULT_LED_N",
"BIOS_DEBUG_MODE_N","FP_LCD_RESET","FAN_TYPE_SEL",
"RST_GLB_RST_WARN_N",
/*G0-G7*/ "IRQ_LPTM21L_ALERT_N","IRQ_PLD_ALERT_N","AC_FAIL_N","FP_LCD_PRESENT_BMC",
"BMC_JTAG_TCK_MUX_SEL","BMC_BIOS_RESERVED","SYS_NMI_N","BMC_NMI_N",
/*H0-H7*/ "JTAG_BMC_TDI","JTAG_BMC_TDO","JTAG_BMC_TCK","JTAG_BMC_TMS","FM_BOARD_ID6",
"FM_SKU_ID0","IRQ_SML1_PMBUS_ALERT_N","IRQ_SML0_ALERT_MUX_N",
/*I0-I7*/ "FM_CPU_ERR0_LVT3_BMC_N","FM_CPU_ERR1_LVT3_BMC_N","FM_BMC_PCH_SCI_LPC_N",
"FM_SYS_THROTTLE_LVC3","SPI2_PCH_CS0_N","","","",
/*J0-J7*/ "FM_CPU0_SKTOCC_LVT3_N","FM_CPU1_SKTOCC_LVT3_N","","SYSHOT_FAULT_LED_N",
"VGA_HSYNC","VGA_VSYNC","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","SYS_UART_TXD1","SYS_UART_RXD1",
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","","","","","",
/*P0-P7*/ "","","","","","","","",
/*Q0-Q7*/ "","","","","","","FM_PCH_BMC_THERMTRIP_N","INTRUDER_N",
/*R0-R7*/ "SPI_BMC_BOOT_CS1_R_N","FM_CPU_MEMHOT_LVC3_N",
"DBP_CPU_PREQ_N","FM_CPU_ERR2_LVT3_BMC_N",
"RISER_NCSI_EN_N","","LOM_NCSI_EN_N","OCP_NCSI_EN_N",
/*S0-S7*/ "BMC_XDP_PRDY_N","SIO_POWER_GOOD","BMC_PWR_DEBUG_R_N","BMC_DEBUG_EN_R_N","",
"GPIOS5_BMC","","GPIOS7_BMC",
/*T0-T7*/ "","","","","","","","",
/*U0-U7*/ "","","","","","","","",
/*V0-V7*/ "","","","","","","","",
/*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","BMC_DET_UID_N","BMC_JTAG_SEL","SIO_ONCONTROL","","","","",
/*Z0-Z7*/ "XDP_PRESENT_N","DBP_SYSPWROK","BMC_JTAG_SEL","FM_SMI_ACTIVE_N","",
"GPIOZ5","","",
/*AA0-AA7*/ "FP_BMC_SYSLED_N","PS_PWROK","RST_PLTRST_BMC_N","HDA_SDO_BMC",
"FM_SLPS4_R_N","","POWER_BUTTON","POWER_OUT",
/*AB0-AB7*/ "RESET_OUT","RESET_BUTTON","BIOS_REFLASH","POST_COMPLETE","","","","",
/*AC0-AC7*/ "","","","","","","","";
};
&i2c0 {
/* FP_LCD */
status = "okay";
};
&i2c1 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
label = "fru";
};
};
&i2c2 {
status = "okay";
tmp112@48 {
compatible = "ti,tmp112";
reg = <0x48>;
label = "inlet";
};
tmp112@49 {
compatible = "ti,tmp112";
reg = <0x49>;
label = "outlet";
};
pca9548@70 {
compatible = "nxp,pca9548";
reg = <0x70>;
};
};
&i2c3 {
status = "okay";
pca9548@70 {
compatible = "nxp,pca9548";
reg = <0x70>;
};
pca9548@71 {
compatible = "nxp,pca9548";
reg = <0x71>;
};
pca9548@72 {
compatible = "nxp,pca9548";
reg = <0x72>;
};
};
&i2c4 {
/* IPMB */
status = "okay";
};
&i2c5 {
status = "okay";
pca9548@70 {
compatible = "nxp,pca9548";
reg = <0x70>;
};
};
&i2c6 {
status = "okay";
pca9548@70 {
compatible = "nxp,pca9548";
reg = <0x70>;
};
};
&i2c7 {
status = "okay";
adm1278@33 {
compatible = "adi,adm1293";
reg = <0x33>;
};
adm1278@32 {
compatible = "adi,adm1293";
reg = <0x32>;
};
adm1278@20 {
compatible = "adi,adm1293";
reg = <0x20>;
};
};
&i2c8 {
status = "okay";
pca0: pca9555@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca1: pca9555@22 {
compatible = "nxp,pca9555";
reg = <0x22>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca2: pca9555@20 {
compatible = "nxp,pca9555";
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca3: pca9555@21 {
compatible = "nxp,pca9555";
reg = <0x21>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c9 {
/* cpld */
status = "okay";
};
&i2c10 {
status = "okay";
pca4: pca9555@24 {
compatible = "nxp,pca9555";
reg = <0x24>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca5: pca9555@25 {
compatible = "nxp,pca9555";
reg = <0x25>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c11 {
status = "okay";
power-supply@58 {
compatible = "inspur,ipsps1";
reg = <0x58>;
};
power-supply@59 {
compatible = "inspur,ipsps1";
reg = <0x59>;
};
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default &pinctrl_pwm7_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;
};
fan@6 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>;
};
fan@7 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>;
};
};
&kcs3 {
status = "okay";
aspeed,lpc-io-reg = <0xca2>;
};
&kcs4 {
status = "okay";
aspeed,lpc-io-reg = <0xca4>;
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
&pinctrl_adc2_default &pinctrl_adc3_default &pinctrl_adc4_default
&pinctrl_adc5_default &pinctrl_adc6_default &pinctrl_adc7_default
&pinctrl_adc8_default &pinctrl_adc9_default &pinctrl_adc10_default
&pinctrl_adc11_default &pinctrl_adc12_default &pinctrl_adc13_default
&pinctrl_adc14_default &pinctrl_adc15_default>;
};
&vhub {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
&vuart {
status = "okay";
};

2
arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
View File

@ -126,7 +126,7 @@
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "led-rear-power","led-rear-id","","usb-power","","","","",
/*P0-P7*/ "","","","","","","","",
/*P0-P7*/ "","","","","","bmc-tpm-reset","","",
/*Q0-Q7*/ "cfam-reset","","","","","","","fsi-routing",
/*R0-R7*/ "","","","","","","","",
/*S0-S7*/ "","","","","","","","",

1
arch/arm/boot/dts/aspeed-g5.dtsi
View File

@ -352,7 +352,6 @@
reg = <0x1e780200 0x0100>;
clocks = <&syscon ASPEED_CLK_APB>;
interrupt-controller;
ngpios = <8>;
bus-frequency = <12000000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sgpm_default>;

4
arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
View File

@ -208,12 +208,12 @@
};
pinctrl_hvi3c3_default: hvi3c3_default {
function = "HVI3C3";
function = "I3C3";
groups = "HVI3C3";
};
pinctrl_hvi3c4_default: hvi3c4_default {
function = "HVI3C4";
function = "I3C4";
groups = "HVI3C4";
};

28
arch/arm/boot/dts/aspeed-g6.dtsi
View File

@ -377,6 +377,34 @@
#interrupt-cells = <2>;
};
sgpiom0: sgpiom@1e780500 {
#gpio-cells = <2>;
gpio-controller;
compatible = "aspeed,ast2600-sgpiom";
reg = <0x1e780500 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_APB2>;
interrupt-controller;
bus-frequency = <12000000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sgpm1_default>;
status = "disabled";
};
sgpiom1: sgpiom@1e780600 {
#gpio-cells = <2>;
gpio-controller;
compatible = "aspeed,ast2600-sgpiom";
reg = <0x1e780600 0x100>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_APB2>;
interrupt-controller;
bus-frequency = <12000000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sgpm2_default>;
status = "disabled";
};
gpio1: gpio@1e780800 {
#gpio-cells = <2>;
gpio-controller;

4
arch/arm/boot/dts/ast2400-facebook-netbmc-common.dtsi
View File

@ -115,3 +115,7 @@
&vhub {
status = "okay";
};
&adc {
status = "okay";
};

169
arch/arm/boot/dts/ast2600-facebook-netbmc-common.dtsi Normal file
View File

@ -0,0 +1,169 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2020 Facebook Inc.
#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
aliases {
mmc0 = &emmc;
spi1 = &spi1;
spi2 = &spi_gpio;
};
chosen {
bootargs = "console=ttyS0,9600n8 root=/dev/ram rw vmalloc=640M";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
/*
* GPIO-based SPI Master is required to access SPI TPM, because
* full-duplex SPI transactions are not supported by ASPEED SPI
* Controllers.
*/
spi_gpio: spi-gpio {
status = "okay";
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpio-sck = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
tpmdev@0 {
compatible = "tcg,tpm_tis-spi";
spi-max-frequency = <33000000>;
reg = <0>;
};
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "spi0.0";
#include "facebook-bmc-flash-layout-128.dtsi"
};
flash@1 {
status = "okay";
m25p,fast-read;
label = "spi0.1";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
flash1@0 {
reg = <0x0 0x8000000>;
label = "flash1";
};
};
};
};
&spi1 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart5 {
status = "okay";
};
&wdt1 {
status = "okay";
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&i2c15 {
status = "okay";
};
&vhub {
status = "okay";
};
&emmc_controller {
status = "okay";
};
&emmc {
status = "okay";
non-removable;
max-frequency = <25000000>;
bus-width = <4>;
};
&rtc {
status = "okay";
};

60
arch/arm/boot/dts/facebook-bmc-flash-layout-128.dtsi Normal file
View File

@ -0,0 +1,60 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2020 Facebook Inc.
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* u-boot partition: 896KB.
*/
u-boot@0 {
reg = <0x0 0xe0000>;
label = "u-boot";
};
/*
* u-boot environment variables: 64KB.
*/
u-boot-env@e0000 {
reg = <0xe0000 0x10000>;
label = "env";
};
/*
* image metadata partition (64KB), used by Facebook internal
* tools.
*/
image-meta@f0000 {
reg = <0xf0000 0x10000>;
label = "meta";
};
/*
* FIT image: 119 MB.
*/
fit@100000 {
reg = <0x100000 0x7700000>;
label = "fit";
};
/*
* "data0" partition (8MB) is used by Facebook BMC platforms as
* persistent data store.
*/
data0@7800000 {
reg = <0x7800000 0x800000>;
label = "data0";
};
/*
* Although the master partition can be created by enabling
* MTD_PARTITIONED_MASTER option, below "flash0" partition is
* explicitly created to avoid breaking legacy applications.
*/
flash0@0 {
reg = <0x0 0x8000000>;
label = "flash0";
};
};