arm64: dts: imx93-11x11-evk: enable fec function
Enable FEC function for imx93-11x11-evk board. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -55,6 +55,26 @@
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy2>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <5000000>;
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ethphy2: ethernet-phy@2 {
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reg = <2>;
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eee-broken-1000t;
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};
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};
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};
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&lpuart1 { /* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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@ -104,6 +124,25 @@
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>;
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};
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e
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MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e
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MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
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MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
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MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
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MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
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MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe
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MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
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MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
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MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
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MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
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MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
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MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe
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MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
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