Merge branch 'swp' (early part) into for-next
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commit
c89c3a6acb
@ -393,19 +393,34 @@ static void __init cpuid_init_hwcaps(void)
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elf_hwcap |= HWCAP_LPAE;
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}
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static void __init feat_v6_fixup(void)
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static void __init elf_hwcap_fixup(void)
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{
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int id = read_cpuid_id();
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if ((id & 0xff0f0000) != 0x41070000)
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return;
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unsigned id = read_cpuid_id();
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unsigned sync_prim;
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/*
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* HWCAP_TLS is available only on 1136 r1p0 and later,
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* see also kuser_get_tls_init.
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*/
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if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0))
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if (read_cpuid_part() == ARM_CPU_PART_ARM1136 &&
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((id >> 20) & 3) == 0) {
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elf_hwcap &= ~HWCAP_TLS;
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return;
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}
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/* Verify if CPUID scheme is implemented */
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if ((id & 0x000f0000) != 0x000f0000)
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return;
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/*
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* If the CPU supports LDREX/STREX and LDREXB/STREXB,
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* avoid advertising SWP; it may not be atomic with
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* multiprocessing cores.
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*/
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sync_prim = ((read_cpuid_ext(CPUID_EXT_ISAR3) >> 8) & 0xf0) |
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((read_cpuid_ext(CPUID_EXT_ISAR4) >> 20) & 0x0f);
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if (sync_prim >= 0x13)
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elf_hwcap &= ~HWCAP_SWP;
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}
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/*
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@ -609,7 +624,7 @@ static void __init setup_processor(void)
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#endif
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erratum_a15_798181_init();
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feat_v6_fixup();
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elf_hwcap_fixup();
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cacheid_init();
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cpu_init();
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@ -27,6 +27,7 @@
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#include <linux/perf_event.h>
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#include <asm/opcodes.h>
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#include <asm/system_info.h>
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#include <asm/traps.h>
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#include <asm/uaccess.h>
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@ -266,6 +267,9 @@ static struct undef_hook swp_hook = {
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*/
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static int __init swp_emulation_init(void)
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{
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if (cpu_architecture() < CPU_ARCH_ARMv7)
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return 0;
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#ifdef CONFIG_PROC_FS
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if (!proc_create("cpu/swp_emulation", S_IRUGO, NULL, &proc_status_fops))
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return -ENOMEM;
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@ -669,7 +669,7 @@ config ARM_VIRT_EXT
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details.
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config SWP_EMULATE
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bool "Emulate SWP/SWPB instructions"
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bool "Emulate SWP/SWPB instructions" if !SMP
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depends on CPU_V7
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default y if SMP
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select HAVE_PROC_CPU if PROC_FS
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