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drm/i915: Move w/a 0477/WaDisableIPC:skl into intel_init_ipc()

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Move the w/a to disable IPC on SKL closer to the actual code
that implements IPS. Otherwise I just end up confused as to
what is excluding SKL from considerations.

IMO this makes more sense anyway since the hw does have the
feature, we're just not supposed to use it.

And this also makes us actually disable IPC in case eg. the
BIOS enabled it when it shouldn't have.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190503173807.10834-3-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2019-05-03 20:38:07 +03:00
parent 5a7d202b15
commit c91a45f421
2 changed files with 14 additions and 7 deletions
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2
drivers/gpu/drm/i915/i915_pci.c
View File

@ -600,8 +600,6 @@ static const struct intel_device_info intel_cherryview_info = {
#define SKL_PLATFORM \
GEN9_FEATURES, \
/* Display WA #0477 WaDisableIPC: skl */ \
.display.has_ipc = 0, \
PLATFORM(INTEL_SKYLAKE)
static const struct intel_device_info intel_skylake_gt1_info = {

19
drivers/gpu/drm/i915/intel_pm.c
View File

@ -6375,16 +6375,25 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
I915_WRITE(DISP_ARB_CTL2, val);
}
static bool intel_can_enable_ipc(struct drm_i915_private *dev_priv)
{
/* Display WA #0477 WaDisableIPC: skl */
if (IS_SKYLAKE(dev_priv))
return false;
/* Display WA #1141: SKL:all KBL:all CFL */
if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
return dev_priv->dram_info.symmetric_memory;
return true;
}
void intel_init_ipc(struct drm_i915_private *dev_priv)
{
if (!HAS_IPC(dev_priv))
return;
/* Display WA #1141: SKL:all KBL:all CFL */
if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
dev_priv->ipc_enabled = dev_priv->dram_info.symmetric_memory;
else
dev_priv->ipc_enabled = true;
dev_priv->ipc_enabled = intel_can_enable_ipc(dev_priv);
intel_enable_ipc(dev_priv);
}