drm/xe: Set require_force_probe in each platform's description
Set require_force_probe explicitly in each platform's description structure rather than embedding it within the FOO_FEATURES macros. Even though we expect all platforms currently supported by the Xe driver to be under force_probe protection, this will help prepare for some other upcoming restructuring. Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20230406235621.1914492-3-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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@ -121,7 +121,6 @@ static const struct xe_media_desc media_xelpmp = {
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/* Keep in gen based order, and chronological order within a gen */
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#define GEN12_FEATURES \
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.require_force_probe = true, \
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.dma_mask_size = 39, \
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.max_tiles = 1, \
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.vm_max_level = 3, \
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@ -132,6 +131,7 @@ static const struct xe_device_desc tgl_desc = {
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.media = &media_xem,
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GEN12_FEATURES,
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PLATFORM(XE_TIGERLAKE),
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.require_force_probe = true,
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.platform_engine_mask =
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BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
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BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VCS0) |
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@ -143,6 +143,7 @@ static const struct xe_device_desc adl_s_desc = {
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.media = &media_xem,
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GEN12_FEATURES,
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PLATFORM(XE_ALDERLAKE_S),
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.require_force_probe = true,
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.platform_engine_mask =
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BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
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BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VCS0) |
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@ -156,6 +157,7 @@ static const struct xe_device_desc adl_p_desc = {
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.media = &media_xem,
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GEN12_FEATURES,
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PLATFORM(XE_ALDERLAKE_P),
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.require_force_probe = true,
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.platform_engine_mask =
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BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
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BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VCS0) |
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@ -175,6 +177,7 @@ static const struct xe_device_desc dg1_desc = {
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GEN12_FEATURES,
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DGFX_FEATURES,
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PLATFORM(XE_DG1),
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.require_force_probe = true,
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.platform_engine_mask =
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BIT(XE_HW_ENGINE_RCS0) | BIT(XE_HW_ENGINE_BCS0) |
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BIT(XE_HW_ENGINE_VECS0) | BIT(XE_HW_ENGINE_VCS0) |
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@ -182,7 +185,6 @@ static const struct xe_device_desc dg1_desc = {
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};
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#define XE_HP_FEATURES \
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.require_force_probe = true, \
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.has_range_tlb_invalidation = true, \
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.has_flat_ccs = true, \
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.dma_mask_size = 46, \
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@ -208,13 +210,13 @@ static const u16 dg2_g12_ids[] = { XE_DG2_G12_IDS(NOP), 0 };
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BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VCS2) | \
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BIT(XE_HW_ENGINE_CCS0) | BIT(XE_HW_ENGINE_CCS1) | \
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BIT(XE_HW_ENGINE_CCS2) | BIT(XE_HW_ENGINE_CCS3), \
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.require_force_probe = true, \
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.vram_flags = XE_VRAM_FLAGS_NEED64K, \
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.has_4tile = 1
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static const struct xe_device_desc ats_m_desc = {
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.graphics = &graphics_xehpg,
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.media = &media_xehpm,
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.require_force_probe = true,
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XE_HP_FEATURES,
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DG2_FEATURES,
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@ -223,6 +225,7 @@ static const struct xe_device_desc ats_m_desc = {
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static const struct xe_device_desc dg2_desc = {
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.graphics = &graphics_xehpg,
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.media = &media_xehpm,
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.require_force_probe = true,
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XE_HP_FEATURES,
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DG2_FEATURES,
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@ -254,6 +257,7 @@ static const __maybe_unused struct xe_device_desc pvc_desc = {
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XE_HP_FEATURES,
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DGFX_FEATURES,
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PLATFORM(XE_PVC),
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.require_force_probe = true,
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.extra_gts = pvc_gts,
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.has_flat_ccs = 0,
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.platform_engine_mask = PVC_ENGINES,
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