MIPS: set mips32r5 for virt extensions
Clang's integrated assembler only accepts these instructions when the cpu is set to mips32r5. With this change, we can assemble malta_defconfig with Clang via `make LLVM_IAS=1`. Link: https://github.com/ClangBuiltLinux/linux/issues/763 Reported-by: Dmitry Golovin <dima@golovin.in> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -2077,7 +2077,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c)
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({ int __res; \
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({ int __res; \
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__asm__ __volatile__( \
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__asm__ __volatile__( \
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".set\tpush\n\t" \
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".set\tpush\n\t" \
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".set\tmips32r2\n\t" \
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".set\tmips32r5\n\t" \
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_ASM_SET_VIRT \
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_ASM_SET_VIRT \
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"mfgc0\t%0, " #source ", %1\n\t" \
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"mfgc0\t%0, " #source ", %1\n\t" \
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".set\tpop" \
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".set\tpop" \
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@ -2090,7 +2090,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c)
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({ unsigned long long __res; \
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({ unsigned long long __res; \
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__asm__ __volatile__( \
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__asm__ __volatile__( \
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".set\tpush\n\t" \
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".set\tpush\n\t" \
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".set\tmips64r2\n\t" \
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".set\tmips64r5\n\t" \
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_ASM_SET_VIRT \
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_ASM_SET_VIRT \
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"dmfgc0\t%0, " #source ", %1\n\t" \
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"dmfgc0\t%0, " #source ", %1\n\t" \
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".set\tpop" \
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".set\tpop" \
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@ -2103,7 +2103,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c)
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do { \
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do { \
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__asm__ __volatile__( \
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__asm__ __volatile__( \
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".set\tpush\n\t" \
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".set\tpush\n\t" \
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".set\tmips32r2\n\t" \
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".set\tmips32r5\n\t" \
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_ASM_SET_VIRT \
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_ASM_SET_VIRT \
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"mtgc0\t%z0, " #register ", %1\n\t" \
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"mtgc0\t%z0, " #register ", %1\n\t" \
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".set\tpop" \
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".set\tpop" \
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@ -2115,7 +2115,7 @@ do { \
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do { \
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do { \
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__asm__ __volatile__( \
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__asm__ __volatile__( \
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".set\tpush\n\t" \
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".set\tpush\n\t" \
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".set\tmips64r2\n\t" \
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".set\tmips64r5\n\t" \
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_ASM_SET_VIRT \
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_ASM_SET_VIRT \
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"dmtgc0\t%z0, " #register ", %1\n\t" \
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"dmtgc0\t%z0, " #register ", %1\n\t" \
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".set\tpop" \
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".set\tpop" \
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