iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

staging: comedi: addi_apci_1564: remove use of devpriv->iobase

Browse Source 
devpriv->iobase is currently being used to hold the iobase address used to
read/write the board's registers.  The same address is stored in the
comedi_device dev->iobase.  We use that instead.  The eventual goal is to
decrease the driver's use of the struct addi_private, so that it may
eventually use a much slimmer specialized private struct instead, as the
other addi_apci_* drivers do.

Signed-off-by: Chase Southwood <chase.southwood@yahoo.com>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Chase Southwood 2014-04-15 00:53:55 -05:00 committed by Greg Kroah-Hartman
parent 3eb9992caf
commit c9b1420c39
1 changed files with 39 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

79
drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c
View File

@ -76,7 +76,7 @@
#define APCI1564_TIMER_WARN_TIMEBASE_REG 0x64
/*
* devpriv->iobase Register Map
* dev>iobase Register Map
*/
#define APCI1564_TCW_REG(x) (0x00 + ((x) * 0x20))
#define APCI1564_TCW_RELOAD_REG(x) (0x04 + ((x) * 0x20))
@ -239,13 +239,13 @@ static int apci1564_timer_config(struct comedi_device *dev,
outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DO_IRQ_REG);
outl(0x0, devpriv->i_IobaseAmcc + APCI1564_WDOG_IRQ_REG);
outl(0x0,
devpriv->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER1));
dev->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER1));
outl(0x0,
devpriv->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER2));
dev->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER2));
outl(0x0,
devpriv->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER3));
dev->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER3));
outl(0x0,
devpriv->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER4));
dev->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER4));
} else {
/* disable Timer interrupt */
outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_CTRL_REG);
@ -266,13 +266,13 @@ static int apci1564_timer_config(struct comedi_device *dev,
devpriv->b_ModeSelectRegister = data[5];
/* First Stop The Counter */
ul_Command1 = inl(devpriv->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
ul_Command1 = inl(dev->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
ul_Command1 = ul_Command1 & 0xFFFFF9FEUL;
/* Stop The Timer */
outl(ul_Command1, devpriv->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
outl(ul_Command1, dev->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
/* Set the reload value */
outl(data[3], devpriv->iobase + APCI1564_TCW_RELOAD_REG(data[5] - 1));
outl(data[3], dev->iobase + APCI1564_TCW_RELOAD_REG(data[5] - 1));
/* Set the mode : */
/* - Disable the hardware */
@ -285,15 +285,15 @@ static int apci1564_timer_config(struct comedi_device *dev,
ul_Command1 =
(ul_Command1 & 0xFFFC19E2UL) | 0x80000UL |
(unsigned int) ((unsigned int) data[4] << 16UL);
outl(ul_Command1, devpriv->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
outl(ul_Command1, dev->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
/* Enable or Disable Interrupt */
ul_Command1 = (ul_Command1 & 0xFFFFF9FD) | (data[1] << 1);
outl(ul_Command1, devpriv->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
outl(ul_Command1, dev->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
/* Set the Up/Down selection */
ul_Command1 = (ul_Command1 & 0xFFFBF9FFUL) | (data[6] << 18);
outl(ul_Command1, devpriv->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
outl(ul_Command1, dev->iobase + APCI1564_TCW_CTRL_REG(data[5] - 1));
} else {
dev_err(dev->class_dev, "Invalid subdevice.\n");
}
@ -349,8 +349,8 @@ static int apci1564_timer_write(struct comedi_device *dev,
}
if (devpriv->b_TimerSelectMode == ADDIDATA_COUNTER) {
ul_Command1 =
inl(devpriv->iobase +
APCI1564_TCW_CTRL_REG(devpriv->b_ModeSelectRegister - 1));
inl(dev->iobase +
APCI1564_TCW_CTRL_REG(devpriv->b_ModeSelectRegister - 1));
if (data[1] == 1) {
/* Start the Counter subdevice */
ul_Command1 = (ul_Command1 & 0xFFFFF9FFUL) | 0x1UL;
@ -362,9 +362,8 @@ static int apci1564_timer_write(struct comedi_device *dev,
/* Clears the Counter subdevice */
ul_Command1 = (ul_Command1 & 0xFFFFF9FFUL) | 0x400;
}
outl(ul_Command1,
devpriv->iobase +
APCI1564_TCW_CTRL_REG(devpriv->b_ModeSelectRegister - 1));
outl(ul_Command1, dev->iobase +
APCI1564_TCW_CTRL_REG(devpriv->b_ModeSelectRegister - 1));
}
return insn->n;
}
@ -393,11 +392,11 @@ static int apci1564_timer_read(struct comedi_device *dev,
} else if (devpriv->b_TimerSelectMode == ADDIDATA_COUNTER) {
/* Read the Counter Actual Value. */
data[0] =
inl(devpriv->iobase +
APCI1564_TCW_REG(devpriv->b_ModeSelectRegister - 1));
inl(dev->iobase +
APCI1564_TCW_REG(devpriv->b_ModeSelectRegister - 1));
ul_Command1 =
inl(devpriv->iobase +
APCI1564_TCW_STATUS_REG(devpriv->b_ModeSelectRegister - 1));
inl(dev->iobase +
APCI1564_TCW_STATUS_REG(devpriv->b_ModeSelectRegister - 1));
/* Get the software trigger status */
data[1] = (unsigned char) ((ul_Command1 >> 1) & 1);
@ -446,13 +445,13 @@ static void apci1564_interrupt(int irq, void *d)
ui_DO = inl(devpriv->i_IobaseAmcc + APCI1564_DO_IRQ_REG) & 0x01;
ui_Timer = inl(devpriv->i_IobaseAmcc + APCI1564_TIMER_IRQ_REG) & 0x01;
ui_C1 =
inl(devpriv->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER1)) & 0x1;
inl(dev->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER1)) & 0x1;
ui_C2 =
inl(devpriv->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER2)) & 0x1;
inl(dev->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER2)) & 0x1;
ui_C3 =
inl(devpriv->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER3)) & 0x1;
inl(dev->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER3)) & 0x1;
ui_C4 =
inl(devpriv->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER4)) & 0x1;
inl(dev->iobase + APCI1564_TCW_IRQ_REG(APCI1564_COUNTER4)) & 0x1;
if (ui_DI == 0 && ui_DO == 0 && ui_Timer == 0 && ui_C1 == 0
&& ui_C2 == 0 && ui_C3 == 0 && ui_C4 == 0) {
dev_err(dev->class_dev, "Interrupt from unknown source.\n");
@ -506,16 +505,16 @@ static void apci1564_interrupt(int irq, void *d)
/* Disable Counter Interrupt */
ul_Command2 =
inl(devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
inl(dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
outl(0x0,
devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
/* Send a signal to from kernel to user space */
send_sig(SIGIO, devpriv->tsk_Current, 0);
/* Enable Counter Interrupt */
outl(ul_Command2,
devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
}
}
@ -525,16 +524,16 @@ static void apci1564_interrupt(int irq, void *d)
/* Disable Counter Interrupt */
ul_Command2 =
inl(devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
inl(dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
outl(0x0,
devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
/* Send a signal to from kernel to user space */
send_sig(SIGIO, devpriv->tsk_Current, 0);
/* Enable Counter Interrupt */
outl(ul_Command2,
devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
}
}
@ -544,16 +543,16 @@ static void apci1564_interrupt(int irq, void *d)
/* Disable Counter Interrupt */
ul_Command2 =
inl(devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
inl(dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
outl(0x0,
devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
/* Send a signal to from kernel to user space */
send_sig(SIGIO, devpriv->tsk_Current, 0);
/* Enable Counter Interrupt */
outl(ul_Command2,
devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
}
}
@ -563,16 +562,16 @@ static void apci1564_interrupt(int irq, void *d)
/* Disable Counter Interrupt */
ul_Command2 =
inl(devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
inl(dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
outl(0x0,
devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
/* Send a signal to from kernel to user space */
send_sig(SIGIO, devpriv->tsk_Current, 0);
/* Enable Counter Interrupt */
outl(ul_Command2,
devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
}
}
return;
@ -599,9 +598,9 @@ static int apci1564_reset(struct comedi_device *dev)
outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_REG);
outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_CTRL_REG);
outl(0x0, devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
outl(0x0, devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
outl(0x0, devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
outl(0x0, devpriv->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
return 0;
}