drm/amdgpu/gfx10: fix typo in gfx_v10_0_update_gfx_clock_gating()
Check was incorrectly converted to IP version checking. Fixes: 4b0ad8425498ba ("drm/amdgpu/gfx10: convert to IP version checking") Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -8238,8 +8238,9 @@ static int gfx_v10_0_update_gfx_clock_gating(struct amdgpu_device *adev,
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/* === CGCG + CGLS === */
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gfx_v10_0_update_coarse_grain_clock_gating(adev, enable);
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if ((adev->ip_versions[GC_HWIP][0] >= IP_VERSION(10, 1, 10)) &&
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(adev->ip_versions[GC_HWIP][0] <= IP_VERSION(10, 1, 2)))
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if ((adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 10)) ||
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(adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 1)) ||
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(adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 2)))
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gfx_v10_0_apply_medium_grain_clock_gating_workaround(adev);
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} else {
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/* CGCG/CGLS should be disabled before MGCG/MGLS
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