platform/x86: intel_pmc_core: Don't use global pmcdev in quirks
The DMI callbacks, used for quirks, currently access the PMC by getting the address a global pmc_dev struct. Instead, have the callbacks set a global quirk specific variable. In probe, after calling dmi_check_system(), pass pmc_dev to a function that will handle each quirk if its variable condition is met. This allows removing the global pmc_dev later. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20210417031252.3020837-2-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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@ -1298,9 +1298,15 @@ static const struct pci_device_id pmc_pci_ids[] = {
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* the platform BIOS enforces 24Mhz crystal to shutdown
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* before PMC can assert SLP_S0#.
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*/
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static bool xtal_ignore;
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static int quirk_xtal_ignore(const struct dmi_system_id *id)
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{
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struct pmc_dev *pmcdev = &pmc;
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xtal_ignore = true;
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return 0;
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}
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static void pmc_core_xtal_ignore(struct pmc_dev *pmcdev)
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{
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u32 value;
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value = pmc_core_reg_read(pmcdev, pmcdev->map->pm_vric1_offset);
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@ -1309,7 +1315,6 @@ static int quirk_xtal_ignore(const struct dmi_system_id *id)
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/* Low Voltage Mode Enable */
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value &= ~SPT_PMC_VRIC1_SLPS0LVEN;
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pmc_core_reg_write(pmcdev, pmcdev->map->pm_vric1_offset, value);
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return 0;
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}
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static const struct dmi_system_id pmc_core_dmi_table[] = {
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@ -1324,6 +1329,14 @@ static const struct dmi_system_id pmc_core_dmi_table[] = {
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{}
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};
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static void pmc_core_do_dmi_quirks(struct pmc_dev *pmcdev)
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{
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dmi_check_system(pmc_core_dmi_table);
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if (xtal_ignore)
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pmc_core_xtal_ignore(pmcdev);
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}
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static int pmc_core_probe(struct platform_device *pdev)
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{
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static bool device_initialized;
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@ -1365,7 +1378,7 @@ static int pmc_core_probe(struct platform_device *pdev)
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mutex_init(&pmcdev->lock);
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platform_set_drvdata(pdev, pmcdev);
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pmcdev->pmc_xram_read_bit = pmc_core_check_read_lock_bit();
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dmi_check_system(pmc_core_dmi_table);
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pmc_core_do_dmi_quirks(pmcdev);
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/*
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* On TGL, due to a hardware limitation, the GBE LTR blocks PC10 when
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