arm64: dts: renesas: r8a77961: Add MSIOF nodes
Add the device nodes for all Clock-Synchronized Serial Interface with FIFO (MSIOF) instances on R-Car M3-W+. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201005112951.22532-1-geert+renesas@glider.be
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@ -1187,6 +1187,68 @@
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status = "disabled";
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};
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msiof0: spi@e6e90000 {
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compatible = "renesas,msiof-r8a77961",
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"renesas,rcar-gen3-msiof";
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reg = <0 0xe6e90000 0 0x0064>;
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interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 211>;
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dmas = <&dmac1 0x41>, <&dmac1 0x40>,
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<&dmac2 0x41>, <&dmac2 0x40>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
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resets = <&cpg 211>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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msiof1: spi@e6ea0000 {
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compatible = "renesas,msiof-r8a77961",
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"renesas,rcar-gen3-msiof";
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reg = <0 0xe6ea0000 0 0x0064>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 210>;
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dmas = <&dmac1 0x43>, <&dmac1 0x42>,
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<&dmac2 0x43>, <&dmac2 0x42>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
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resets = <&cpg 210>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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msiof2: spi@e6c00000 {
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compatible = "renesas,msiof-r8a77961",
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"renesas,rcar-gen3-msiof";
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reg = <0 0xe6c00000 0 0x0064>;
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interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 209>;
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dmas = <&dmac0 0x45>, <&dmac0 0x44>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
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resets = <&cpg 209>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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msiof3: spi@e6c10000 {
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compatible = "renesas,msiof-r8a77961",
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"renesas,rcar-gen3-msiof";
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reg = <0 0xe6c10000 0 0x0064>;
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interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 208>;
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dmas = <&dmac0 0x47>, <&dmac0 0x46>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
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resets = <&cpg 208>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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vin0: video@e6ef0000 {
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reg = <0 0xe6ef0000 0 0x1000>;
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/* placeholder */
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