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can: flexcan: assert FRZ bit in flexcan_chip_freeze()

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commit 449052cfebf624b670faa040245d3feed770d22f upstream.

Assert HALT bit to enter freeze mode, there is a premise that FRZ bit is
asserted. This patch asserts FRZ bit in flexcan_chip_freeze, although
the reset value is 1b'1. This is a prepare patch, later patch will
invoke flexcan_chip_freeze() to enter freeze mode, which polling freeze
mode acknowledge.

Fixes: b1aa1c7a2165b ("can: flexcan: fix transition from and to freeze mode in chip_{,un}freeze")
Link: https://lore.kernel.org/r/20210218110037.16591-2-qiangqing.zhang@nxp.com
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Joakim Zhang 2021-02-18 19:00:35 +08:00 committed by Greg Kroah-Hartman
parent 6676e510d1
commit ca483b872d
1 changed files with 1 additions and 1 deletions
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2
drivers/net/can/flexcan.c
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@ -548,7 +548,7 @@ static int flexcan_chip_freeze(struct flexcan_priv *priv)
u32 reg;
reg = priv->read(&regs->mcr);
reg |= FLEXCAN_MCR_HALT;
reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT;
priv->write(reg, &regs->mcr);
while (timeout-- && !(priv->read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK))