mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly
Disable DLL delay line settings explicitly during driver initialization in case ROM/uBoot had set an invalid delay. e.g. MX6DL ROM has set the default delay line(DLLCTRL) to 0x1000021, the uSDHC clock timing will become marginal when works on DDR mode due to default delay and will possibly see CRC errors in case the board is not perfectly designed on the eMMC chip layout. Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -1187,6 +1187,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
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*/
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writel(readl(host->ioaddr + 0x6c) | BIT(7),
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host->ioaddr + 0x6c);
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/* disable DLL_CTRL delay line settings */
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writel(0x0, host->ioaddr + ESDHC_DLL_CTRL);
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}
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if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING)
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