iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

drm/nouveau/nvjpg/r535: initial support

Browse Source 
Adds support for allocating NVJPG classes from RM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-44-skeggsb@gmail.com
This commit is contained in:
Ben Skeggs 2023-09-19 06:21:48 +10:00 committed by Dave Airlie
parent 08ab88f5a0
commit ca9686340a
16 changed files with 246 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/nouveau/include/nvif/cl0080.h
View File

@ -91,6 +91,7 @@ struct nv_device_time_v0 {
#define NV_DEVICE_HOST_RUNLIST_ENGINES_SEC2 0x00004000
#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVDEC 0x00008000
#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVENC 0x00010000
#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVJPG 0x00020000
/* Returns the number of available channels on runlist(data). */
#define NV_DEVICE_HOST_RUNLIST_CHANNELS NV_DEVICE_HOST(0x00000101)
#endif

3
drivers/gpu/drm/nouveau/include/nvif/class.h
View File

@ -253,4 +253,7 @@
#define ADA_COMPUTE_A 0x0000c9c0
#define NV74_CIPHER 0x000074c1
#define NVC4D1_VIDEO_NVJPG 0x0000c4d1
#define NVC9D1_VIDEO_NVJPG 0x0000c9d1
#endif

8
drivers/gpu/drm/nouveau/include/nvkm/engine/nvjpg.h Normal file
View File

@ -0,0 +1,8 @@
/* SPDX-License-Identifier: MIT */
#ifndef __NVKM_NVJPG_H__
#define __NVKM_NVJPG_H__
#include <core/engine.h>
int ga100_nvjpg_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
int ad102_nvjpg_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_engine **);
#endif

7
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/nvos.h
View File

@ -119,6 +119,13 @@ typedef struct
NvU32 engineInstance; // Select MSENC/NVENC0 or NVENC1 or NVENC2
} NV_MSENC_ALLOCATION_PARAMETERS;
typedef struct
{
NvU32 size;
NvU32 prohibitMultipleInstances; // Prohibit multiple allocations of NVJPG?
NvU32 engineInstance;
} NV_NVJPG_ALLOCATION_PARAMETERS;
typedef struct
{
NvU32 index;

5
drivers/gpu/drm/nouveau/include/nvrm/535.54.03/nvidia/inc/kernel/gpu/intr/engine_idx.h
View File

@ -37,6 +37,11 @@
#define MC_ENGINE_IDX_MSENC2 40
#define MC_ENGINE_IDX_GSP 49
#define MC_ENGINE_IDX_NVJPG 50
#define MC_ENGINE_IDX_NVJPEG MC_ENGINE_IDX_NVJPG
#define MC_ENGINE_IDX_NVJPEG0 MC_ENGINE_IDX_NVJPEG
#define MC_ENGINE_IDX_NVJPEG7 57
#define MC_ENGINE_IDX_BSP 64
#define MC_ENGINE_IDX_NVDEC MC_ENGINE_IDX_BSP

1
drivers/gpu/drm/nouveau/nvkm/engine/Kbuild
View File

@ -17,6 +17,7 @@ include $(src)/nvkm/engine/msppp/Kbuild
include $(src)/nvkm/engine/msvld/Kbuild
include $(src)/nvkm/engine/nvenc/Kbuild
include $(src)/nvkm/engine/nvdec/Kbuild
include $(src)/nvkm/engine/nvjpg/Kbuild
include $(src)/nvkm/engine/pm/Kbuild
include $(src)/nvkm/engine/sec/Kbuild
include $(src)/nvkm/engine/sec2/Kbuild

6
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
View File

@ -2593,6 +2593,7 @@ nv170_chipset = {
.ce = { 0x000003ff, ga100_ce_new },
.fifo = { 0x00000001, ga100_fifo_new },
.nvdec = { 0x0000001f, ga100_nvdec_new },
.nvjpg = { 0x00000001, ga100_nvjpg_new },
};
static const struct nvkm_device_chip
@ -2771,6 +2772,7 @@ nv192_chipset = {
.gr = { 0x00000001, ad102_gr_new },
.nvdec = { 0x0000000f, ad102_nvdec_new },
.nvenc = { 0x00000007, ad102_nvenc_new },
.nvjpg = { 0x0000000f, ad102_nvjpg_new },
.sec2 = { 0x00000001, ga102_sec2_new },
};
@ -2795,6 +2797,7 @@ nv193_chipset = {
.gr = { 0x00000001, ad102_gr_new },
.nvdec = { 0x0000000f, ad102_nvdec_new },
.nvenc = { 0x00000007, ad102_nvenc_new },
.nvjpg = { 0x0000000f, ad102_nvjpg_new },
.sec2 = { 0x00000001, ga102_sec2_new },
};
@ -2819,6 +2822,7 @@ nv194_chipset = {
.gr = { 0x00000001, ad102_gr_new },
.nvdec = { 0x0000000f, ad102_nvdec_new },
.nvenc = { 0x00000007, ad102_nvenc_new },
.nvjpg = { 0x0000000f, ad102_nvjpg_new },
.sec2 = { 0x00000001, ga102_sec2_new },
};
@ -2843,6 +2847,7 @@ nv196_chipset = {
.gr = { 0x00000001, ad102_gr_new },
.nvdec = { 0x0000000f, ad102_nvdec_new },
.nvenc = { 0x00000007, ad102_nvenc_new },
.nvjpg = { 0x0000000f, ad102_nvjpg_new },
.sec2 = { 0x00000001, ga102_sec2_new },
};
@ -2867,6 +2872,7 @@ nv197_chipset = {
.gr = { 0x00000001, ad102_gr_new },
.nvdec = { 0x0000000f, ad102_nvdec_new },
.nvenc = { 0x00000007, ad102_nvenc_new },
.nvjpg = { 0x0000000f, ad102_nvjpg_new },
.sec2 = { 0x00000001, ga102_sec2_new },
};

1
drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
View File

@ -43,6 +43,7 @@
#include <engine/msvld.h>
#include <engine/nvenc.h>
#include <engine/nvdec.h>
#include <engine/nvjpg.h>
#include <engine/pm.h>
#include <engine/sec.h>
#include <engine/sec2.h>

1
drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
View File

@ -210,6 +210,7 @@ nvkm_fifo_info(struct nvkm_engine *engine, u64 mthd, u64 *data)
CASE(SEC2 );
CASE(NVDEC );
CASE(NVENC );
CASE(NVJPG );
default:
WARN_ON(1);
break;

1
drivers/gpu/drm/nouveau/nvkm/engine/fifo/r535.c
View File

@ -597,6 +597,7 @@ r535_fifo_runl_ctor(struct nvkm_fifo *fifo)
break;
case NVKM_ENGINE_NVDEC:
case NVKM_ENGINE_NVENC:
case NVKM_ENGINE_NVJPG:
engn = nvkm_runl_add(runl, nv2080, &r535_flcn, type, inst);
break;
case NVKM_ENGINE_SW:

5
drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/Kbuild Normal file
View File

@ -0,0 +1,5 @@
# SPDX-License-Identifier: MIT
nvkm-y += nvkm/engine/nvjpg/ga100.o
nvkm-y += nvkm/engine/nvjpg/ad102.o
nvkm-y += nvkm/engine/nvjpg/r535.o

44
drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ad102.c Normal file
View File

@ -0,0 +1,44 @@
/*
* Copyright 2023 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "priv.h"
#include <subdev/gsp.h>
#include <nvif/class.h>
static const struct nvkm_engine_func
ad102_nvjpg = {
.sclass = {
{ -1, -1, NVC9D1_VIDEO_NVJPG },
{}
}
};
int
ad102_nvjpg_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_engine **pengine)
{
if (nvkm_gsp_rm(device->gsp))
return r535_nvjpg_new(&ad102_nvjpg, device, type, inst, pengine);
return -ENODEV;
}

44
drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ga100.c Normal file
View File

@ -0,0 +1,44 @@
/*
* Copyright 2023 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "priv.h"
#include <subdev/gsp.h>
#include <nvif/class.h>
static const struct nvkm_engine_func
ga100_nvjpg = {
.sclass = {
{ -1, -1, NVC4D1_VIDEO_NVJPG },
{}
}
};
int
ga100_nvjpg_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_engine **pengine)
{
if (nvkm_gsp_rm(device->gsp))
return r535_nvjpg_new(&ga100_nvjpg, device, type, inst, pengine);
return -ENODEV;
}

8
drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/priv.h Normal file
View File

@ -0,0 +1,8 @@
/* SPDX-License-Identifier: MIT */
#ifndef __NVKM_NVJPG_PRIV_H__
#define __NVKM_NVJPG_PRIV_H__
#include <engine/nvjpg.h>
int r535_nvjpg_new(const struct nvkm_engine_func *, struct nvkm_device *,
enum nvkm_subdev_type, int, struct nvkm_engine **);
#endif

107
drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/r535.c Normal file
View File

@ -0,0 +1,107 @@
/*
* Copyright 2023 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "priv.h"
#include <core/object.h>
#include <subdev/gsp.h>
#include <engine/fifo.h>
#include <nvrm/nvtypes.h>
#include <nvrm/535.54.03/common/sdk/nvidia/inc/nvos.h>
struct r535_nvjpg_obj {
struct nvkm_object object;
struct nvkm_gsp_object rm;
};
static void *
r535_nvjpg_obj_dtor(struct nvkm_object *object)
{
struct r535_nvjpg_obj *obj = container_of(object, typeof(*obj), object);
nvkm_gsp_rm_free(&obj->rm);
return obj;
}
static const struct nvkm_object_func
r535_nvjpg_obj = {
.dtor = r535_nvjpg_obj_dtor,
};
static int
r535_nvjpg_obj_ctor(const struct nvkm_oclass *oclass, void *argv, u32 argc,
struct nvkm_object **pobject)
{
struct nvkm_chan *chan = nvkm_uchan_chan(oclass->parent);
struct r535_nvjpg_obj *obj;
NV_NVJPG_ALLOCATION_PARAMETERS *args;
if (!(obj = kzalloc(sizeof(*obj), GFP_KERNEL)))
return -ENOMEM;
nvkm_object_ctor(&r535_nvjpg_obj, oclass, &obj->object);
*pobject = &obj->object;
args = nvkm_gsp_rm_alloc_get(&chan->rm.object, oclass->handle, oclass->base.oclass,
sizeof(*args), &obj->rm);
if (WARN_ON(IS_ERR(args)))
return PTR_ERR(args);
args->size = sizeof(*args);
args->engineInstance = oclass->engine->subdev.inst;
return nvkm_gsp_rm_alloc_wr(&obj->rm, args);
}
static void *
r535_nvjpg_dtor(struct nvkm_engine *engine)
{
kfree(engine->func);
return engine;
}
int
r535_nvjpg_new(const struct nvkm_engine_func *hw, struct nvkm_device *device,
enum nvkm_subdev_type type, int inst, struct nvkm_engine **pengine)
{
struct nvkm_engine_func *rm;
int nclass, ret;
for (nclass = 0; hw->sclass[nclass].oclass; nclass++);
if (!(rm = kzalloc(sizeof(*rm) + (nclass + 1) * sizeof(rm->sclass[0]), GFP_KERNEL)))
return -ENOMEM;
rm->dtor = r535_nvjpg_dtor;
for (int i = 0; i < nclass; i++) {
rm->sclass[i].minver = hw->sclass[i].minver;
rm->sclass[i].maxver = hw->sclass[i].maxver;
rm->sclass[i].oclass = hw->sclass[i].oclass;
rm->sclass[i].ctor = r535_nvjpg_obj_ctor;
}
ret = nvkm_engine_new_(rm, device, type, inst, true, pengine);
if (ret)
kfree(rm);
return ret;
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c
View File

@ -867,6 +867,10 @@ r535_gsp_intr_get_table(struct nvkm_gsp *gsp)
type = NVKM_ENGINE_NVENC;
inst = ctrl->table[i].engineIdx - MC_ENGINE_IDX_MSENC;
break;
case MC_ENGINE_IDX_NVJPEG0 ... MC_ENGINE_IDX_NVJPEG7:
type = NVKM_ENGINE_NVJPG;
inst = ctrl->table[i].engineIdx - MC_ENGINE_IDX_NVJPEG0;
break;
default:
continue;
}