drm: Remove the obsolete driver-i810
Commit 399516ab0fee ("MAINTAINERS: Add a bunch of legacy (UMS) DRM drivers")
marked i810 driver obsolete 7 years ago.
And the mesa UMD of this drm driver already in deprecated list
in the link: https://docs.mesa3d.org/systems.html
Intel i810-->driver/gpu/drm/i810
It's time to remove this driver.
Signed-off-by: Cai Huoqing <cai.huoqing@linux.dev>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20221203102502.3185-2-cai.huoqing@linux.dev
This commit is contained in:
Cai Huoqing
Thomas Zimmermann
parent
cf8698df3a
commit
cab18866fe
@ -414,15 +414,6 @@ config DRM_R128
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is selected, the module will be called r128. AGP support for
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this card is strongly suggested (unless you have a PCI version).
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config DRM_I810
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tristate "Intel I810"
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# !PREEMPTION because of missing ioctl locking
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depends on DRM && AGP && AGP_INTEL && (!PREEMPTION || BROKEN)
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help
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Choose this option if you have an Intel I810 graphics card. If M is
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selected, the module will be called i810. AGP support is required
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for this driver to work.
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config DRM_MGA
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tristate "Matrox g200/g400"
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depends on DRM && PCI
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@ -138,7 +138,6 @@ obj-$(CONFIG_DRM_R128) += r128/
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obj-$(CONFIG_DRM_RADEON)+= radeon/
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obj-$(CONFIG_DRM_AMDGPU)+= amd/amdgpu/
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obj-$(CONFIG_DRM_MGA) += mga/
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obj-$(CONFIG_DRM_I810) += i810/
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obj-$(CONFIG_DRM_I915) += i915/
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obj-$(CONFIG_DRM_KMB_DISPLAY) += kmb/
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obj-$(CONFIG_DRM_MGAG200) += mgag200/
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@ -1,8 +0,0 @@
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# SPDX-License-Identifier: GPL-2.0-only
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#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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i810-y := i810_drv.o i810_dma.o
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obj-$(CONFIG_DRM_I810) += i810.o
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File diff suppressed because it is too large
Load Diff
@ -1,101 +0,0 @@
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/* i810_drv.c -- I810 driver -*- linux-c -*-
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* Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
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*
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Rickard E. (Rik) Faith <faith@valinux.com>
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* Jeff Hartmann <jhartmann@valinux.com>
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* Gareth Hughes <gareth@valinux.com>
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*/
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#include "i810_drv.h"
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_file.h>
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#include <drm/drm_pciids.h>
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#include <drm/i810_drm.h>
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static struct pci_device_id pciidlist[] = {
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i810_PCI_IDS
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};
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static const struct file_operations i810_driver_fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release,
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.unlocked_ioctl = drm_ioctl,
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.mmap = drm_legacy_mmap,
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.poll = drm_poll,
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.compat_ioctl = drm_compat_ioctl,
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.llseek = noop_llseek,
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};
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static struct drm_driver driver = {
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.driver_features = DRIVER_USE_AGP | DRIVER_HAVE_DMA | DRIVER_LEGACY,
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.dev_priv_size = sizeof(drm_i810_buf_priv_t),
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.load = i810_driver_load,
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.lastclose = i810_driver_lastclose,
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.preclose = i810_driver_preclose,
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.dma_quiescent = i810_driver_dma_quiescent,
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.ioctls = i810_ioctls,
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.fops = &i810_driver_fops,
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = DRIVER_DATE,
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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.patchlevel = DRIVER_PATCHLEVEL,
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};
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static struct pci_driver i810_pci_driver = {
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.name = DRIVER_NAME,
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.id_table = pciidlist,
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};
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static int __init i810_init(void)
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{
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if (num_possible_cpus() > 1) {
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pr_err("drm/i810 does not support SMP\n");
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return -EINVAL;
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}
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driver.num_ioctls = i810_max_ioctl;
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return drm_legacy_pci_init(&driver, &i810_pci_driver);
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}
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static void __exit i810_exit(void)
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{
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drm_legacy_pci_exit(&driver, &i810_pci_driver);
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}
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module_init(i810_init);
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module_exit(i810_exit);
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL and additional rights");
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@ -1,246 +0,0 @@
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/* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
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* Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
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*
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors: Rickard E. (Rik) Faith <faith@valinux.com>
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* Jeff Hartmann <jhartmann@valinux.com>
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*
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*/
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#ifndef _I810_DRV_H_
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#define _I810_DRV_H_
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#include <drm/drm_ioctl.h>
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#include <drm/drm_legacy.h>
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#include <drm/i810_drm.h>
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/* General customization:
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*/
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#define DRIVER_AUTHOR "VA Linux Systems Inc."
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#define DRIVER_NAME "i810"
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#define DRIVER_DESC "Intel i810"
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#define DRIVER_DATE "20030605"
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/* Interface history
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*
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* 1.1 - XFree86 4.1
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* 1.2 - XvMC interfaces
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* - XFree86 4.2
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* 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility)
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* - Remove requirement for interrupt (leave stubs again)
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* 1.3 - Add page flipping.
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* 1.4 - fix DRM interface
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*/
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 4
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#define DRIVER_PATCHLEVEL 0
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typedef struct drm_i810_buf_priv {
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u32 *in_use;
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int my_use_idx;
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int currently_mapped;
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void *virtual;
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void *kernel_virtual;
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drm_local_map_t map;
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} drm_i810_buf_priv_t;
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typedef struct _drm_i810_ring_buffer {
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int tail_mask;
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unsigned long Start;
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unsigned long End;
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unsigned long Size;
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u8 *virtual_start;
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int head;
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int tail;
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int space;
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drm_local_map_t map;
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} drm_i810_ring_buffer_t;
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typedef struct drm_i810_private {
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struct drm_local_map *sarea_map;
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struct drm_local_map *mmio_map;
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drm_i810_sarea_t *sarea_priv;
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drm_i810_ring_buffer_t ring;
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void *hw_status_page;
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unsigned long counter;
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dma_addr_t dma_status_page;
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struct drm_buf *mmap_buffer;
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u32 front_di1, back_di1, zi1;
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int back_offset;
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int depth_offset;
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int overlay_offset;
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int overlay_physical;
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int w, h;
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int pitch;
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int back_pitch;
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int depth_pitch;
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int do_boxes;
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int dma_used;
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int current_page;
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int page_flipping;
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wait_queue_head_t irq_queue;
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atomic_t irq_received;
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atomic_t irq_emitted;
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int front_offset;
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} drm_i810_private_t;
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/* i810_dma.c */
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extern int i810_driver_dma_quiescent(struct drm_device *dev);
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void i810_driver_reclaim_buffers(struct drm_device *dev,
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struct drm_file *file_priv);
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extern int i810_driver_load(struct drm_device *, unsigned long flags);
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extern void i810_driver_lastclose(struct drm_device *dev);
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extern void i810_driver_preclose(struct drm_device *dev,
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struct drm_file *file_priv);
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extern long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
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extern const struct drm_ioctl_desc i810_ioctls[];
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extern int i810_max_ioctl;
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#define I810_BASE(reg) ((unsigned long) \
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dev_priv->mmio_map->handle)
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#define I810_ADDR(reg) (I810_BASE(reg) + reg)
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#define I810_DEREF(reg) (*(__volatile__ int *)I810_ADDR(reg))
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#define I810_READ(reg) I810_DEREF(reg)
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#define I810_WRITE(reg, val) do { I810_DEREF(reg) = val; } while (0)
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#define I810_DEREF16(reg) (*(__volatile__ u16 *)I810_ADDR(reg))
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#define I810_READ16(reg) I810_DEREF16(reg)
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#define I810_WRITE16(reg, val) do { I810_DEREF16(reg) = val; } while (0)
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#define I810_VERBOSE 0
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#define RING_LOCALS unsigned int outring, ringmask; \
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volatile char *virt;
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#define BEGIN_LP_RING(n) do { \
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if (I810_VERBOSE) \
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DRM_DEBUG("BEGIN_LP_RING(%d)\n", n); \
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if (dev_priv->ring.space < n*4) \
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i810_wait_ring(dev, n*4); \
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dev_priv->ring.space -= n*4; \
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outring = dev_priv->ring.tail; \
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ringmask = dev_priv->ring.tail_mask; \
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virt = dev_priv->ring.virtual_start; \
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} while (0)
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#define ADVANCE_LP_RING() do { \
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if (I810_VERBOSE) \
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DRM_DEBUG("ADVANCE_LP_RING\n"); \
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dev_priv->ring.tail = outring; \
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I810_WRITE(LP_RING + RING_TAIL, outring); \
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} while (0)
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#define OUT_RING(n) do { \
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if (I810_VERBOSE) \
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DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
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*(volatile unsigned int *)(virt + outring) = n; \
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outring += 4; \
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outring &= ringmask; \
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} while (0)
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#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
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#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
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#define CMD_REPORT_HEAD (7<<23)
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#define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1)
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#define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1)
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#define INST_PARSER_CLIENT 0x00000000
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#define INST_OP_FLUSH 0x02000000
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#define INST_FLUSH_MAP_CACHE 0x00000001
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#define BB1_START_ADDR_MASK (~0x7)
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#define BB1_PROTECTED (1<<0)
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#define BB1_UNPROTECTED (0<<0)
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#define BB2_END_ADDR_MASK (~0x7)
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#define I810REG_HWSTAM 0x02098
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#define I810REG_INT_IDENTITY_R 0x020a4
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#define I810REG_INT_MASK_R 0x020a8
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#define I810REG_INT_ENABLE_R 0x020a0
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#define LP_RING 0x2030
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#define HP_RING 0x2040
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#define RING_TAIL 0x00
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#define TAIL_ADDR 0x000FFFF8
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#define RING_HEAD 0x04
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#define HEAD_WRAP_COUNT 0xFFE00000
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#define HEAD_WRAP_ONE 0x00200000
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#define HEAD_ADDR 0x001FFFFC
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#define RING_START 0x08
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#define START_ADDR 0x00FFFFF8
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#define RING_LEN 0x0C
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#define RING_NR_PAGES 0x000FF000
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#define RING_REPORT_MASK 0x00000006
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#define RING_REPORT_64K 0x00000002
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#define RING_REPORT_128K 0x00000004
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#define RING_NO_REPORT 0x00000000
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#define RING_VALID_MASK 0x00000001
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#define RING_VALID 0x00000001
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#define RING_INVALID 0x00000000
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#define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19))
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#define SC_UPDATE_SCISSOR (0x1<<1)
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#define SC_ENABLE_MASK (0x1<<0)
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#define SC_ENABLE (0x1<<0)
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#define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
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#define SCI_YMIN_MASK (0xffff<<16)
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#define SCI_XMIN_MASK (0xffff<<0)
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#define SCI_YMAX_MASK (0xffff<<16)
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#define SCI_XMAX_MASK (0xffff<<0)
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#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
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#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
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#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2)
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#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
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#define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
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#define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24))
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#define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23))
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#define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23))
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#define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)|(0x14<<23))
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#define CMD_OP_WAIT_FOR_EVENT ((0x0<<29)|(0x03<<23))
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#define BR00_BITBLT_CLIENT 0x40000000
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#define BR00_OP_COLOR_BLT 0x10000000
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#define BR00_OP_SRC_COPY_BLT 0x10C00000
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#define BR13_SOLID_PATTERN 0x80000000
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#define WAIT_FOR_PLANE_A_SCANLINES (1<<1)
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#define WAIT_FOR_PLANE_A_FLIP (1<<2)
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#define WAIT_FOR_VBLANK (1<<3)
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#endif
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@ -1,292 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _I810_DRM_H_
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#define _I810_DRM_H_
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#include "drm.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/* WARNING: These defines must be the same as what the Xserver uses.
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* if you change them, you must change the defines in the Xserver.
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*/
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#ifndef _I810_DEFINES_
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#define _I810_DEFINES_
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#define I810_DMA_BUF_ORDER 12
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#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER)
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#define I810_DMA_BUF_NR 256
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#define I810_NR_SAREA_CLIPRECTS 8
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/* Each region is a minimum of 64k, and there are at most 64 of them.
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*/
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#define I810_NR_TEX_REGIONS 64
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#define I810_LOG_MIN_TEX_REGION_SIZE 16
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#endif
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#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
|
||||
#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
|
||||
#define I810_UPLOAD_CTX 0x4
|
||||
#define I810_UPLOAD_BUFFERS 0x8
|
||||
#define I810_UPLOAD_TEX0 0x10
|
||||
#define I810_UPLOAD_TEX1 0x20
|
||||
#define I810_UPLOAD_CLIPRECTS 0x40
|
||||
|
||||
/* Indices into buf.Setup where various bits of state are mirrored per
|
||||
* context and per buffer. These can be fired at the card as a unit,
|
||||
* or in a piecewise fashion as required.
|
||||
*/
|
||||
|
||||
/* Destbuffer state
|
||||
* - backbuffer linear offset and pitch -- invarient in the current dri
|
||||
* - zbuffer linear offset and pitch -- also invarient
|
||||
* - drawing origin in back and depth buffers.
|
||||
*
|
||||
* Keep the depth/back buffer state here to accommodate private buffers
|
||||
* in the future.
|
||||
*/
|
||||
#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */
|
||||
#define I810_DESTREG_DI1 1
|
||||
#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */
|
||||
#define I810_DESTREG_DV1 3
|
||||
#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */
|
||||
#define I810_DESTREG_DR1 5
|
||||
#define I810_DESTREG_DR2 6
|
||||
#define I810_DESTREG_DR3 7
|
||||
#define I810_DESTREG_DR4 8
|
||||
#define I810_DEST_SETUP_SIZE 10
|
||||
|
||||
/* Context state
|
||||
*/
|
||||
#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */
|
||||
#define I810_CTXREG_CF1 1
|
||||
#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */
|
||||
#define I810_CTXREG_ST1 3
|
||||
#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */
|
||||
#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */
|
||||
#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */
|
||||
#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
|
||||
#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */
|
||||
#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
|
||||
#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
|
||||
#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
|
||||
#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */
|
||||
#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */
|
||||
#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */
|
||||
#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */
|
||||
#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
|
||||
#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */
|
||||
#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */
|
||||
#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */
|
||||
#define I810_CTX_SETUP_SIZE 20
|
||||
|
||||
/* Texture state (per tex unit)
|
||||
*/
|
||||
#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */
|
||||
#define I810_TEXREG_MI1 1
|
||||
#define I810_TEXREG_MI2 2
|
||||
#define I810_TEXREG_MI3 3
|
||||
#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */
|
||||
#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */
|
||||
#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */
|
||||
#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */
|
||||
#define I810_TEX_SETUP_SIZE 8
|
||||
|
||||
/* Flags for clear ioctl
|
||||
*/
|
||||
#define I810_FRONT 0x1
|
||||
#define I810_BACK 0x2
|
||||
#define I810_DEPTH 0x4
|
||||
|
||||
typedef enum _drm_i810_init_func {
|
||||
I810_INIT_DMA = 0x01,
|
||||
I810_CLEANUP_DMA = 0x02,
|
||||
I810_INIT_DMA_1_4 = 0x03
|
||||
} drm_i810_init_func_t;
|
||||
|
||||
/* This is the init structure after v1.2 */
|
||||
typedef struct _drm_i810_init {
|
||||
drm_i810_init_func_t func;
|
||||
unsigned int mmio_offset;
|
||||
unsigned int buffers_offset;
|
||||
int sarea_priv_offset;
|
||||
unsigned int ring_start;
|
||||
unsigned int ring_end;
|
||||
unsigned int ring_size;
|
||||
unsigned int front_offset;
|
||||
unsigned int back_offset;
|
||||
unsigned int depth_offset;
|
||||
unsigned int overlay_offset;
|
||||
unsigned int overlay_physical;
|
||||
unsigned int w;
|
||||
unsigned int h;
|
||||
unsigned int pitch;
|
||||
unsigned int pitch_bits;
|
||||
} drm_i810_init_t;
|
||||
|
||||
/* This is the init structure prior to v1.2 */
|
||||
typedef struct _drm_i810_pre12_init {
|
||||
drm_i810_init_func_t func;
|
||||
unsigned int mmio_offset;
|
||||
unsigned int buffers_offset;
|
||||
int sarea_priv_offset;
|
||||
unsigned int ring_start;
|
||||
unsigned int ring_end;
|
||||
unsigned int ring_size;
|
||||
unsigned int front_offset;
|
||||
unsigned int back_offset;
|
||||
unsigned int depth_offset;
|
||||
unsigned int w;
|
||||
unsigned int h;
|
||||
unsigned int pitch;
|
||||
unsigned int pitch_bits;
|
||||
} drm_i810_pre12_init_t;
|
||||
|
||||
/* Warning: If you change the SAREA structure you must change the Xserver
|
||||
* structure as well */
|
||||
|
||||
typedef struct _drm_i810_tex_region {
|
||||
unsigned char next, prev; /* indices to form a circular LRU */
|
||||
unsigned char in_use; /* owned by a client, or free? */
|
||||
int age; /* tracked by clients to update local LRU's */
|
||||
} drm_i810_tex_region_t;
|
||||
|
||||
typedef struct _drm_i810_sarea {
|
||||
unsigned int ContextState[I810_CTX_SETUP_SIZE];
|
||||
unsigned int BufferState[I810_DEST_SETUP_SIZE];
|
||||
unsigned int TexState[2][I810_TEX_SETUP_SIZE];
|
||||
unsigned int dirty;
|
||||
|
||||
unsigned int nbox;
|
||||
struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
|
||||
|
||||
/* Maintain an LRU of contiguous regions of texture space. If
|
||||
* you think you own a region of texture memory, and it has an
|
||||
* age different to the one you set, then you are mistaken and
|
||||
* it has been stolen by another client. If global texAge
|
||||
* hasn't changed, there is no need to walk the list.
|
||||
*
|
||||
* These regions can be used as a proxy for the fine-grained
|
||||
* texture information of other clients - by maintaining them
|
||||
* in the same lru which is used to age their own textures,
|
||||
* clients have an approximate lru for the whole of global
|
||||
* texture space, and can make informed decisions as to which
|
||||
* areas to kick out. There is no need to choose whether to
|
||||
* kick out your own texture or someone else's - simply eject
|
||||
* them all in LRU order.
|
||||
*/
|
||||
|
||||
drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
|
||||
/* Last elt is sentinal */
|
||||
int texAge; /* last time texture was uploaded */
|
||||
int last_enqueue; /* last time a buffer was enqueued */
|
||||
int last_dispatch; /* age of the most recently dispatched buffer */
|
||||
int last_quiescent; /* */
|
||||
int ctxOwner; /* last context to upload state */
|
||||
|
||||
int vertex_prim;
|
||||
|
||||
int pf_enabled; /* is pageflipping allowed? */
|
||||
int pf_active;
|
||||
int pf_current_page; /* which buffer is being displayed? */
|
||||
} drm_i810_sarea_t;
|
||||
|
||||
/* WARNING: If you change any of these defines, make sure to change the
|
||||
* defines in the Xserver file (xf86drmMga.h)
|
||||
*/
|
||||
|
||||
/* i810 specific ioctls
|
||||
* The device specific ioctl range is 0x40 to 0x79.
|
||||
*/
|
||||
#define DRM_I810_INIT 0x00
|
||||
#define DRM_I810_VERTEX 0x01
|
||||
#define DRM_I810_CLEAR 0x02
|
||||
#define DRM_I810_FLUSH 0x03
|
||||
#define DRM_I810_GETAGE 0x04
|
||||
#define DRM_I810_GETBUF 0x05
|
||||
#define DRM_I810_SWAP 0x06
|
||||
#define DRM_I810_COPY 0x07
|
||||
#define DRM_I810_DOCOPY 0x08
|
||||
#define DRM_I810_OV0INFO 0x09
|
||||
#define DRM_I810_FSTATUS 0x0a
|
||||
#define DRM_I810_OV0FLIP 0x0b
|
||||
#define DRM_I810_MC 0x0c
|
||||
#define DRM_I810_RSTATUS 0x0d
|
||||
#define DRM_I810_FLIP 0x0e
|
||||
|
||||
#define DRM_IOCTL_I810_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t)
|
||||
#define DRM_IOCTL_I810_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t)
|
||||
#define DRM_IOCTL_I810_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t)
|
||||
#define DRM_IOCTL_I810_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_I810_FLUSH)
|
||||
#define DRM_IOCTL_I810_GETAGE DRM_IO( DRM_COMMAND_BASE + DRM_I810_GETAGE)
|
||||
#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t)
|
||||
#define DRM_IOCTL_I810_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_I810_SWAP)
|
||||
#define DRM_IOCTL_I810_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t)
|
||||
#define DRM_IOCTL_I810_DOCOPY DRM_IO( DRM_COMMAND_BASE + DRM_I810_DOCOPY)
|
||||
#define DRM_IOCTL_I810_OV0INFO DRM_IOR( DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t)
|
||||
#define DRM_IOCTL_I810_FSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FSTATUS)
|
||||
#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
|
||||
#define DRM_IOCTL_I810_MC DRM_IOW( DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t)
|
||||
#define DRM_IOCTL_I810_RSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_RSTATUS)
|
||||
#define DRM_IOCTL_I810_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FLIP)
|
||||
|
||||
typedef struct _drm_i810_clear {
|
||||
int clear_color;
|
||||
int clear_depth;
|
||||
int flags;
|
||||
} drm_i810_clear_t;
|
||||
|
||||
/* These may be placeholders if we have more cliprects than
|
||||
* I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to
|
||||
* false, indicating that the buffer will be dispatched again with a
|
||||
* new set of cliprects.
|
||||
*/
|
||||
typedef struct _drm_i810_vertex {
|
||||
int idx; /* buffer index */
|
||||
int used; /* nr bytes in use */
|
||||
int discard; /* client is finished with the buffer? */
|
||||
} drm_i810_vertex_t;
|
||||
|
||||
typedef struct _drm_i810_copy_t {
|
||||
int idx; /* buffer index */
|
||||
int used; /* nr bytes in use */
|
||||
void *address; /* Address to copy from */
|
||||
} drm_i810_copy_t;
|
||||
|
||||
#define PR_TRIANGLES (0x0<<18)
|
||||
#define PR_TRISTRIP_0 (0x1<<18)
|
||||
#define PR_TRISTRIP_1 (0x2<<18)
|
||||
#define PR_TRIFAN (0x3<<18)
|
||||
#define PR_POLYGON (0x4<<18)
|
||||
#define PR_LINES (0x5<<18)
|
||||
#define PR_LINESTRIP (0x6<<18)
|
||||
#define PR_RECTS (0x7<<18)
|
||||
#define PR_MASK (0x7<<18)
|
||||
|
||||
typedef struct drm_i810_dma {
|
||||
void *virtual;
|
||||
int request_idx;
|
||||
int request_size;
|
||||
int granted;
|
||||
} drm_i810_dma_t;
|
||||
|
||||
typedef struct _drm_i810_overlay_t {
|
||||
unsigned int offset; /* Address of the Overlay Regs */
|
||||
unsigned int physical;
|
||||
} drm_i810_overlay_t;
|
||||
|
||||
typedef struct _drm_i810_mc {
|
||||
int idx; /* buffer index */
|
||||
int used; /* nr bytes in use */
|
||||
int num_blocks; /* number of GFXBlocks */
|
||||
int *length; /* List of lengths for GFXBlocks (FUTURE) */
|
||||
unsigned int last_render; /* Last Render Request */
|
||||
} drm_i810_mc_t;
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _I810_DRM_H_ */
|
||||
Loading…
x
Reference in New Issue
Block a user