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drm/amdgpu: add IH_RING1_CFG headers for IH v6.0

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Add offsets, mask and shift macros for IH v6.0
which are needed to configure ring1 client irq
redirection.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sunil Khatri 2024-04-12 14:47:30 +05:30 committed by Alex Deucher
parent 5e984b0a3d
commit cba9b630f0
2 changed files with 14 additions and 0 deletions
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4
drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_offset.h
View File

@ -237,6 +237,10 @@
#define regSEM_REGISTER_LAST_PART2_BASE_IDX 0
#define regIH_CLIENT_CFG 0x0184
#define regIH_CLIENT_CFG_BASE_IDX 0
#define regIH_RING1_CLIENT_CFG_INDEX 0x0185
#define regIH_RING1_CLIENT_CFG_INDEX_BASE_IDX 0
#define regIH_RING1_CLIENT_CFG_DATA 0x0186
#define regIH_RING1_CLIENT_CFG_DATA_BASE_IDX 0
#define regIH_CLIENT_CFG_INDEX 0x0188
#define regIH_CLIENT_CFG_INDEX_BASE_IDX 0
#define regIH_CLIENT_CFG_DATA 0x0189

10
drivers/gpu/drm/amd/include/asic_reg/oss/osssys_6_0_0_sh_mask.h
View File

@ -888,6 +888,16 @@
//IH_CLIENT_CFG
#define IH_CLIENT_CFG__TOTAL_CLIENT_NUM__SHIFT 0x0
#define IH_CLIENT_CFG__TOTAL_CLIENT_NUM_MASK 0x0000003FL
//IH_RING1_CLIENT_CFG_INDEX
#define IH_RING1_CLIENT_CFG_INDEX__INDEX__SHIFT 0x0
#define IH_RING1_CLIENT_CFG_INDEX__INDEX_MASK 0x00000007L
//IH_RING1_CLIENT_CFG_DATA
#define IH_RING1_CLIENT_CFG_DATA__CLIENT_ID__SHIFT 0x0
#define IH_RING1_CLIENT_CFG_DATA__SOURCE_ID__SHIFT 0x8
#define IH_RING1_CLIENT_CFG_DATA__SOURCE_ID_MATCH_ENABLE__SHIFT 0x10
#define IH_RING1_CLIENT_CFG_DATA__CLIENT_ID_MASK 0x000000FFL
#define IH_RING1_CLIENT_CFG_DATA__SOURCE_ID_MASK 0x0000FF00L
#define IH_RING1_CLIENT_CFG_DATA__SOURCE_ID_MATCH_ENABLE_MASK 0x00010000L
//IH_CLIENT_CFG_INDEX
#define IH_CLIENT_CFG_INDEX__INDEX__SHIFT 0x0
#define IH_CLIENT_CFG_INDEX__INDEX_MASK 0x0000001FL