x86/asm/decoder: Explain CALLW discrepancy between Intel and AMD
In 64-bit mode, AMD and Intel CPUs treat 0x66 prefix before branch insns differently. For near branches, it affects decode too since immediate offset's width is different. See these empirical tests: http://marc.info/?l=linux-kernel&m=139714939728946&w=2 Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: Oleg Nesterov <oleg@redhat.com> Link: http://lkml.kernel.org/r/1423768017-31766-1-git-send-email-dvlasenk@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -273,6 +273,9 @@ dd: ESC
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de: ESC
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df: ESC
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# 0xe0 - 0xef
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# Note: "forced64" is Intel CPU behavior: they ignore 0x66 prefix
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# in 64-bit mode. AMD CPUs accept 0x66 prefix, it causes RIP truncation
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# to 16 bits. In 32-bit mode, 0x66 is accepted by both Intel and AMD.
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e0: LOOPNE/LOOPNZ Jb (f64)
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e1: LOOPE/LOOPZ Jb (f64)
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e2: LOOP Jb (f64)
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@ -281,6 +284,10 @@ e4: IN AL,Ib
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e5: IN eAX,Ib
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e6: OUT Ib,AL
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e7: OUT Ib,eAX
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# With 0x66 prefix in 64-bit mode, for AMD CPUs immediate offset
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# in "near" jumps and calls is 16-bit. For CALL,
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# push of return address is 16-bit wide, RSP is decremented by 2
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# but is not truncated to 16 bits, unlike RIP.
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e8: CALL Jz (f64)
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e9: JMP-near Jz (f64)
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ea: JMP-far Ap (i64)
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@ -456,6 +463,7 @@ AVXcode: 1
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7e: movd/q Ey,Pd | vmovd/q Ey,Vy (66),(v1) | vmovq Vq,Wq (F3),(v1)
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7f: movq Qq,Pq | vmovdqa Wx,Vx (66) | vmovdqu Wx,Vx (F3)
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# 0x0f 0x80-0x8f
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# Note: "forced64" is Intel CPU behavior (see comment about CALL insn).
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80: JO Jz (f64)
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81: JNO Jz (f64)
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82: JB/JC/JNAE Jz (f64)
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@ -842,6 +850,7 @@ EndTable
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GrpTable: Grp5
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0: INC Ev
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1: DEC Ev
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# Note: "forced64" is Intel CPU behavior (see comment about CALL insn).
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2: CALLN Ev (f64)
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3: CALLF Ep
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4: JMPN Ev (f64)
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