iio: dac: ad5770r: Add AD5770R support
The AD5770R is a 6-channel, 14-bit resolution, low noise, programmable current output digital-to-analog converter (DAC) for photonics control applications. It contains five 14-bit resolution current sourcing DAC channels and one 14-bit resolution current sourcing/sinking DAC channel. Signed-off-by: Mircea Caprioru <mircea.caprioru@analog.com> Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Alexandru Tachici
Jonathan Cameron
parent
070bd30a51
commit
cbbb819837
@ -209,6 +209,16 @@ config AD5764
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To compile this driver as a module, choose M here: the
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module will be called ad5764.
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config AD5770R
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tristate "Analog Devices AD5770R IDAC driver"
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depends on SPI_MASTER
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help
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Say yes here to build support for Analog Devices AD5770R Digital to
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Analog Converter.
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To compile this driver as a module, choose M here: the
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module will be called ad5770r.
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config AD5791
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tristate "Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC SPI driver"
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depends on SPI
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@ -19,6 +19,7 @@ obj-$(CONFIG_AD5755) += ad5755.o
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obj-$(CONFIG_AD5755) += ad5758.o
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obj-$(CONFIG_AD5761) += ad5761.o
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obj-$(CONFIG_AD5764) += ad5764.o
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obj-$(CONFIG_AD5770R) += ad5770r.o
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obj-$(CONFIG_AD5791) += ad5791.o
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obj-$(CONFIG_AD5686) += ad5686.o
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obj-$(CONFIG_AD5686_SPI) += ad5686-spi.o
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695
drivers/iio/dac/ad5770r.c
Normal file
695
drivers/iio/dac/ad5770r.c
Normal file
@ -0,0 +1,695 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* AD5770R Digital to analog converters driver
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*
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* Copyright 2018 Analog Devices Inc.
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*/
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#include <linux/bits.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/gpio/consumer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#define ADI_SPI_IF_CONFIG_A 0x00
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#define ADI_SPI_IF_CONFIG_B 0x01
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#define ADI_SPI_IF_DEVICE_CONFIG 0x02
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#define ADI_SPI_IF_CHIP_TYPE 0x03
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#define ADI_SPI_IF_PRODUCT_ID_L 0x04
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#define ADI_SPI_IF_PRODUCT_ID_H 0x05
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#define ADI_SPI_IF_CHIP_GRADE 0x06
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#define ADI_SPI_IF_SCRACTH_PAD 0x0A
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#define ADI_SPI_IF_SPI_REVISION 0x0B
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#define ADI_SPI_IF_SPI_VENDOR_L 0x0C
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#define ADI_SPI_IF_SPI_VENDOR_H 0x0D
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#define ADI_SPI_IF_SPI_STREAM_MODE 0x0E
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#define ADI_SPI_IF_CONFIG_C 0x10
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#define ADI_SPI_IF_STATUS_A 0x11
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/* ADI_SPI_IF_CONFIG_A */
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#define ADI_SPI_IF_SW_RESET_MSK (BIT(0) | BIT(7))
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#define ADI_SPI_IF_SW_RESET_SEL(x) ((x) & ADI_SPI_IF_SW_RESET_MSK)
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#define ADI_SPI_IF_ADDR_ASC_MSK (BIT(2) | BIT(5))
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#define ADI_SPI_IF_ADDR_ASC_SEL(x) (((x) << 2) & ADI_SPI_IF_ADDR_ASC_MSK)
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/* ADI_SPI_IF_CONFIG_B */
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#define ADI_SPI_IF_SINGLE_INS_MSK BIT(7)
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#define ADI_SPI_IF_SINGLE_INS_SEL(x) FIELD_PREP(ADI_SPI_IF_SINGLE_INS_MSK, x)
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#define ADI_SPI_IF_SHORT_INS_MSK BIT(7)
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#define ADI_SPI_IF_SHORT_INS_SEL(x) FIELD_PREP(ADI_SPI_IF_SINGLE_INS_MSK, x)
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/* ADI_SPI_IF_CONFIG_C */
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#define ADI_SPI_IF_STRICT_REG_MSK BIT(5)
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#define ADI_SPI_IF_STRICT_REG_GET(x) FIELD_GET(ADI_SPI_IF_STRICT_REG_MSK, x)
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/* AD5770R configuration registers */
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#define AD5770R_CHANNEL_CONFIG 0x14
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#define AD5770R_OUTPUT_RANGE(ch) (0x15 + (ch))
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#define AD5770R_FILTER_RESISTOR(ch) (0x1D + (ch))
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#define AD5770R_REFERENCE 0x1B
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#define AD5770R_DAC_LSB(ch) (0x26 + 2 * (ch))
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#define AD5770R_DAC_MSB(ch) (0x27 + 2 * (ch))
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#define AD5770R_CH_SELECT 0x34
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#define AD5770R_CH_ENABLE 0x44
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/* AD5770R_CHANNEL_CONFIG */
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#define AD5770R_CFG_CH0_SINK_EN(x) (((x) & 0x1) << 7)
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#define AD5770R_CFG_SHUTDOWN_B(x, ch) (((x) & 0x1) << (ch))
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/* AD5770R_OUTPUT_RANGE */
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#define AD5770R_RANGE_OUTPUT_SCALING(x) (((x) & GENMASK(5, 0)) << 2)
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#define AD5770R_RANGE_MODE(x) ((x) & GENMASK(1, 0))
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/* AD5770R_REFERENCE */
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#define AD5770R_REF_RESISTOR_SEL(x) (((x) & 0x1) << 2)
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#define AD5770R_REF_SEL(x) ((x) & GENMASK(1, 0))
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/* AD5770R_CH_ENABLE */
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#define AD5770R_CH_SET(x, ch) (((x) & 0x1) << (ch))
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#define AD5770R_MAX_CHANNELS 6
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#define AD5770R_MAX_CH_MODES 14
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#define AD5770R_LOW_VREF_mV 1250
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#define AD5770R_HIGH_VREF_mV 2500
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enum ad5770r_ch0_modes {
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AD5770R_CH0_0_300 = 0,
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AD5770R_CH0_NEG_60_0,
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AD5770R_CH0_NEG_60_300
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};
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enum ad5770r_ch1_modes {
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AD5770R_CH1_0_140_LOW_HEAD = 1,
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AD5770R_CH1_0_140_LOW_NOISE,
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AD5770R_CH1_0_250
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};
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enum ad5770r_ch2_5_modes {
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AD5770R_CH_LOW_RANGE = 0,
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AD5770R_CH_HIGH_RANGE
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};
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enum ad5770r_ref_v {
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AD5770R_EXT_2_5_V = 0,
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AD5770R_INT_1_25_V_OUT_ON,
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AD5770R_EXT_1_25_V,
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AD5770R_INT_1_25_V_OUT_OFF
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};
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enum ad5770r_output_filter_resistor {
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AD5770R_FILTER_60_OHM = 0x0,
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AD5770R_FILTER_5_6_KOHM = 0x5,
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AD5770R_FILTER_11_2_KOHM,
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AD5770R_FILTER_22_2_KOHM,
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AD5770R_FILTER_44_4_KOHM,
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AD5770R_FILTER_104_KOHM,
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};
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struct ad5770r_out_range {
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u8 out_scale;
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u8 out_range_mode;
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};
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/**
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* struct ad5770R_state - driver instance specific data
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* @spi: spi_device
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* @regmap: regmap
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* @vref_reg: fixed regulator for reference configuration
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* @gpio_reset: gpio descriptor
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* @output_mode: array contains channels output ranges
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* @vref: reference value
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* @ch_pwr_down: powerdown flags
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* @internal_ref: internal reference flag
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* @external_res: external 2.5k resistor flag
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* @transf_buf: cache aligned buffer for spi read/write
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*/
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struct ad5770r_state {
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struct spi_device *spi;
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struct regmap *regmap;
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struct regulator *vref_reg;
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struct gpio_desc *gpio_reset;
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struct ad5770r_out_range output_mode[AD5770R_MAX_CHANNELS];
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int vref;
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bool ch_pwr_down[AD5770R_MAX_CHANNELS];
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bool internal_ref;
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bool external_res;
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u8 transf_buf[2] ____cacheline_aligned;
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};
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static const struct regmap_config ad5770r_spi_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.read_flag_mask = BIT(7),
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};
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struct ad5770r_output_modes {
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unsigned int ch;
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u8 mode;
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int min;
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int max;
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};
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static struct ad5770r_output_modes ad5770r_rng_tbl[] = {
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{ 0, AD5770R_CH0_0_300, 0, 300 },
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{ 0, AD5770R_CH0_NEG_60_0, -60, 0 },
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{ 0, AD5770R_CH0_NEG_60_300, -60, 300 },
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{ 1, AD5770R_CH1_0_140_LOW_HEAD, 0, 140 },
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{ 1, AD5770R_CH1_0_140_LOW_NOISE, 0, 140 },
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{ 1, AD5770R_CH1_0_250, 0, 250 },
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{ 2, AD5770R_CH_LOW_RANGE, 0, 55 },
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{ 2, AD5770R_CH_HIGH_RANGE, 0, 150 },
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{ 3, AD5770R_CH_LOW_RANGE, 0, 45 },
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{ 3, AD5770R_CH_HIGH_RANGE, 0, 100 },
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{ 4, AD5770R_CH_LOW_RANGE, 0, 45 },
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{ 4, AD5770R_CH_HIGH_RANGE, 0, 100 },
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{ 5, AD5770R_CH_LOW_RANGE, 0, 45 },
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{ 5, AD5770R_CH_HIGH_RANGE, 0, 100 },
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};
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static const unsigned int ad5770r_filter_freqs[] = {
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153, 357, 715, 1400, 2800, 262000,
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};
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static const unsigned int ad5770r_filter_reg_vals[] = {
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AD5770R_FILTER_104_KOHM,
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AD5770R_FILTER_44_4_KOHM,
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AD5770R_FILTER_22_2_KOHM,
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AD5770R_FILTER_11_2_KOHM,
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AD5770R_FILTER_5_6_KOHM,
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AD5770R_FILTER_60_OHM
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};
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static int ad5770r_set_output_mode(struct ad5770r_state *st,
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const struct ad5770r_out_range *out_mode,
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int channel)
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{
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unsigned int regval;
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regval = AD5770R_RANGE_OUTPUT_SCALING(out_mode->out_scale) |
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AD5770R_RANGE_MODE(out_mode->out_range_mode);
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return regmap_write(st->regmap,
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AD5770R_OUTPUT_RANGE(channel), regval);
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}
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static int ad5770r_set_reference(struct ad5770r_state *st)
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{
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unsigned int regval;
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regval = AD5770R_REF_RESISTOR_SEL(st->external_res);
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if (st->internal_ref) {
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regval |= AD5770R_REF_SEL(AD5770R_INT_1_25_V_OUT_OFF);
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} else {
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switch (st->vref) {
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case AD5770R_LOW_VREF_mV:
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regval |= AD5770R_REF_SEL(AD5770R_EXT_1_25_V);
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break;
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case AD5770R_HIGH_VREF_mV:
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regval |= AD5770R_REF_SEL(AD5770R_EXT_2_5_V);
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break;
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default:
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regval = AD5770R_REF_SEL(AD5770R_INT_1_25_V_OUT_OFF);
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break;
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}
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}
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return regmap_write(st->regmap, AD5770R_REFERENCE, regval);
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}
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static int ad5770r_soft_reset(struct ad5770r_state *st)
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{
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return regmap_write(st->regmap, ADI_SPI_IF_CONFIG_A,
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ADI_SPI_IF_SW_RESET_SEL(1));
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}
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static int ad5770r_reset(struct ad5770r_state *st)
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{
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/* Perform software reset if no GPIO provided */
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if (!st->gpio_reset)
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return ad5770r_soft_reset(st);
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gpiod_set_value_cansleep(st->gpio_reset, 0);
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usleep_range(10, 20);
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gpiod_set_value_cansleep(st->gpio_reset, 1);
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/* data must not be written during reset timeframe */
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usleep_range(100, 200);
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return 0;
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}
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static int ad5770r_get_range(struct ad5770r_state *st,
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int ch, int *min, int *max)
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{
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int i;
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u8 tbl_ch, tbl_mode, out_range;
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out_range = st->output_mode[ch].out_range_mode;
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for (i = 0; i < AD5770R_MAX_CH_MODES; i++) {
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tbl_ch = ad5770r_rng_tbl[i].ch;
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tbl_mode = ad5770r_rng_tbl[i].mode;
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if (tbl_ch == ch && tbl_mode == out_range) {
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*min = ad5770r_rng_tbl[i].min;
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*max = ad5770r_rng_tbl[i].max;
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return 0;
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}
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}
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return -EINVAL;
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}
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static int ad5770r_get_filter_freq(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, int *freq)
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{
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struct ad5770r_state *st = iio_priv(indio_dev);
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int ret;
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unsigned int regval, i;
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ret = regmap_read(st->regmap,
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AD5770R_FILTER_RESISTOR(chan->channel), ®val);
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if (ret < 0)
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return ret;
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for (i = 0; i < ARRAY_SIZE(ad5770r_filter_reg_vals); i++)
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if (regval == ad5770r_filter_reg_vals[i])
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break;
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if (i == ARRAY_SIZE(ad5770r_filter_reg_vals))
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return -EINVAL;
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*freq = ad5770r_filter_freqs[i];
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return IIO_VAL_INT;
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}
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static int ad5770r_set_filter_freq(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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unsigned int freq)
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{
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struct ad5770r_state *st = iio_priv(indio_dev);
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unsigned int regval, i;
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for (i = 0; i < ARRAY_SIZE(ad5770r_filter_freqs); i++)
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if (ad5770r_filter_freqs[i] >= freq)
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break;
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if (i == ARRAY_SIZE(ad5770r_filter_freqs))
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return -EINVAL;
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regval = ad5770r_filter_reg_vals[i];
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return regmap_write(st->regmap, AD5770R_FILTER_RESISTOR(chan->channel),
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regval);
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}
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static int ad5770r_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long info)
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{
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struct ad5770r_state *st = iio_priv(indio_dev);
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int max, min, ret;
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u16 buf16;
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switch (info) {
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case IIO_CHAN_INFO_RAW:
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ret = regmap_bulk_read(st->regmap,
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chan->address,
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st->transf_buf, 2);
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if (ret)
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return 0;
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buf16 = st->transf_buf[0] + (st->transf_buf[1] << 8);
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*val = buf16 >> 2;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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ret = ad5770r_get_range(st, chan->channel, &min, &max);
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if (ret < 0)
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return ret;
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*val = max - min;
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/* There is no sign bit. (negative current is mapped from 0)
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* (sourced/sinked) current = raw * scale + offset
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* where offset in case of CH0 can be negative.
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*/
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*val2 = 14;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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return ad5770r_get_filter_freq(indio_dev, chan, val);
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case IIO_CHAN_INFO_OFFSET:
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ret = ad5770r_get_range(st, chan->channel, &min, &max);
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if (ret < 0)
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return ret;
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*val = min;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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static int ad5770r_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long info)
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{
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struct ad5770r_state *st = iio_priv(indio_dev);
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switch (info) {
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case IIO_CHAN_INFO_RAW:
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st->transf_buf[0] = ((u16)val >> 6);
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st->transf_buf[1] = (val & GENMASK(5, 0)) << 2;
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return regmap_bulk_write(st->regmap, chan->address,
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st->transf_buf, 2);
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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return ad5770r_set_filter_freq(indio_dev, chan, val);
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default:
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return -EINVAL;
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}
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}
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static int ad5770r_read_freq_avail(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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const int **vals, int *type, int *length,
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long mask)
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{
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switch (mask) {
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case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
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*type = IIO_VAL_INT;
|
||||
*vals = ad5770r_filter_freqs;
|
||||
*length = ARRAY_SIZE(ad5770r_filter_freqs);
|
||||
return IIO_AVAIL_LIST;
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int ad5770r_reg_access(struct iio_dev *indio_dev,
|
||||
unsigned int reg,
|
||||
unsigned int writeval,
|
||||
unsigned int *readval)
|
||||
{
|
||||
struct ad5770r_state *st = iio_priv(indio_dev);
|
||||
|
||||
if (readval)
|
||||
return regmap_read(st->regmap, reg, readval);
|
||||
else
|
||||
return regmap_write(st->regmap, reg, writeval);
|
||||
}
|
||||
|
||||
static const struct iio_info ad5770r_info = {
|
||||
.read_raw = ad5770r_read_raw,
|
||||
.write_raw = ad5770r_write_raw,
|
||||
.read_avail = ad5770r_read_freq_avail,
|
||||
.debugfs_reg_access = &ad5770r_reg_access,
|
||||
};
|
||||
|
||||
static int ad5770r_store_output_range(struct ad5770r_state *st,
|
||||
int min, int max, int index)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < AD5770R_MAX_CH_MODES; i++) {
|
||||
if (ad5770r_rng_tbl[i].ch != index)
|
||||
continue;
|
||||
if (ad5770r_rng_tbl[i].min != min ||
|
||||
ad5770r_rng_tbl[i].max != max)
|
||||
continue;
|
||||
st->output_mode[index].out_range_mode = ad5770r_rng_tbl[i].mode;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static ssize_t ad5770r_read_dac_powerdown(struct iio_dev *indio_dev,
|
||||
uintptr_t private,
|
||||
const struct iio_chan_spec *chan,
|
||||
char *buf)
|
||||
{
|
||||
struct ad5770r_state *st = iio_priv(indio_dev);
|
||||
|
||||
return sprintf(buf, "%d\n", st->ch_pwr_down[chan->channel]);
|
||||
}
|
||||
|
||||
static ssize_t ad5770r_write_dac_powerdown(struct iio_dev *indio_dev,
|
||||
uintptr_t private,
|
||||
const struct iio_chan_spec *chan,
|
||||
const char *buf, size_t len)
|
||||
{
|
||||
struct ad5770r_state *st = iio_priv(indio_dev);
|
||||
unsigned int regval;
|
||||
unsigned int mask;
|
||||
bool readin;
|
||||
int ret;
|
||||
|
||||
ret = kstrtobool(buf, &readin);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
readin = !readin;
|
||||
|
||||
regval = AD5770R_CFG_SHUTDOWN_B(readin, chan->channel);
|
||||
if (chan->channel == 0 &&
|
||||
st->output_mode[0].out_range_mode > AD5770R_CH0_0_300) {
|
||||
regval |= AD5770R_CFG_CH0_SINK_EN(readin);
|
||||
mask = BIT(chan->channel) + BIT(7);
|
||||
} else {
|
||||
mask = BIT(chan->channel);
|
||||
}
|
||||
ret = regmap_update_bits(st->regmap, AD5770R_CHANNEL_CONFIG, mask,
|
||||
regval);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
regval = AD5770R_CH_SET(readin, chan->channel);
|
||||
ret = regmap_update_bits(st->regmap, AD5770R_CH_ENABLE,
|
||||
BIT(chan->channel), regval);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
st->ch_pwr_down[chan->channel] = !readin;
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static const struct iio_chan_spec_ext_info ad5770r_ext_info[] = {
|
||||
{
|
||||
.name = "powerdown",
|
||||
.read = ad5770r_read_dac_powerdown,
|
||||
.write = ad5770r_write_dac_powerdown,
|
||||
.shared = IIO_SEPARATE,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
#define AD5770R_IDAC_CHANNEL(index, reg) { \
|
||||
.type = IIO_CURRENT, \
|
||||
.address = reg, \
|
||||
.indexed = 1, \
|
||||
.channel = index, \
|
||||
.output = 1, \
|
||||
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
|
||||
BIT(IIO_CHAN_INFO_SCALE) | \
|
||||
BIT(IIO_CHAN_INFO_OFFSET) | \
|
||||
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
|
||||
.info_mask_shared_by_type_available = \
|
||||
BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
|
||||
.ext_info = ad5770r_ext_info, \
|
||||
}
|
||||
|
||||
static const struct iio_chan_spec ad5770r_channels[] = {
|
||||
AD5770R_IDAC_CHANNEL(0, AD5770R_DAC_MSB(0)),
|
||||
AD5770R_IDAC_CHANNEL(1, AD5770R_DAC_MSB(1)),
|
||||
AD5770R_IDAC_CHANNEL(2, AD5770R_DAC_MSB(2)),
|
||||
AD5770R_IDAC_CHANNEL(3, AD5770R_DAC_MSB(3)),
|
||||
AD5770R_IDAC_CHANNEL(4, AD5770R_DAC_MSB(4)),
|
||||
AD5770R_IDAC_CHANNEL(5, AD5770R_DAC_MSB(5)),
|
||||
};
|
||||
|
||||
static int ad5770r_channel_config(struct ad5770r_state *st)
|
||||
{
|
||||
int ret, tmp[2], min, max;
|
||||
unsigned int num;
|
||||
struct fwnode_handle *child;
|
||||
|
||||
num = device_get_child_node_count(&st->spi->dev);
|
||||
if (num != AD5770R_MAX_CHANNELS)
|
||||
return -EINVAL;
|
||||
|
||||
device_for_each_child_node(&st->spi->dev, child) {
|
||||
ret = fwnode_property_read_u32(child, "num", &num);
|
||||
if (ret)
|
||||
return ret;
|
||||
if (num > AD5770R_MAX_CHANNELS)
|
||||
return -EINVAL;
|
||||
|
||||
ret = fwnode_property_read_u32_array(child,
|
||||
"adi,range-microamp",
|
||||
tmp, 2);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
min = tmp[0] / 1000;
|
||||
max = tmp[1] / 1000;
|
||||
ret = ad5770r_store_output_range(st, min, max, num);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ad5770r_init(struct ad5770r_state *st)
|
||||
{
|
||||
int ret, i;
|
||||
|
||||
st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset",
|
||||
GPIOD_OUT_HIGH);
|
||||
if (IS_ERR(st->gpio_reset))
|
||||
return PTR_ERR(st->gpio_reset);
|
||||
|
||||
/* Perform a reset */
|
||||
ret = ad5770r_reset(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Set output range */
|
||||
ret = ad5770r_channel_config(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (i = 0; i < AD5770R_MAX_CHANNELS; i++) {
|
||||
ret = ad5770r_set_output_mode(st, &st->output_mode[i], i);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
st->external_res = fwnode_property_read_bool(st->spi->dev.fwnode,
|
||||
"adi,external-resistor");
|
||||
|
||||
ret = ad5770r_set_reference(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Set outputs off */
|
||||
ret = regmap_write(st->regmap, AD5770R_CHANNEL_CONFIG, 0x00);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = regmap_write(st->regmap, AD5770R_CH_ENABLE, 0x00);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (i = 0; i < AD5770R_MAX_CHANNELS; i++)
|
||||
st->ch_pwr_down[i] = true;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ad5770r_disable_regulator(void *data)
|
||||
{
|
||||
struct ad5770r_state *st = data;
|
||||
|
||||
regulator_disable(st->vref_reg);
|
||||
}
|
||||
|
||||
static int ad5770r_probe(struct spi_device *spi)
|
||||
{
|
||||
struct ad5770r_state *st;
|
||||
struct iio_dev *indio_dev;
|
||||
struct regmap *regmap;
|
||||
int ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
st = iio_priv(indio_dev);
|
||||
spi_set_drvdata(spi, indio_dev);
|
||||
|
||||
st->spi = spi;
|
||||
|
||||
regmap = devm_regmap_init_spi(spi, &ad5770r_spi_regmap_config);
|
||||
if (IS_ERR(regmap)) {
|
||||
dev_err(&spi->dev, "Error initializing spi regmap: %ld\n",
|
||||
PTR_ERR(regmap));
|
||||
return PTR_ERR(regmap);
|
||||
}
|
||||
st->regmap = regmap;
|
||||
|
||||
st->vref_reg = devm_regulator_get_optional(&spi->dev, "vref");
|
||||
if (!IS_ERR(st->vref_reg)) {
|
||||
ret = regulator_enable(st->vref_reg);
|
||||
if (ret) {
|
||||
dev_err(&spi->dev,
|
||||
"Failed to enable vref regulators: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = devm_add_action_or_reset(&spi->dev,
|
||||
ad5770r_disable_regulator,
|
||||
st);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = regulator_get_voltage(st->vref_reg);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
st->vref = ret / 1000;
|
||||
} else {
|
||||
if (PTR_ERR(st->vref_reg) == -ENODEV) {
|
||||
st->vref = AD5770R_LOW_VREF_mV;
|
||||
st->internal_ref = true;
|
||||
} else {
|
||||
return PTR_ERR(st->vref_reg);
|
||||
}
|
||||
}
|
||||
|
||||
indio_dev->dev.parent = &spi->dev;
|
||||
indio_dev->name = spi_get_device_id(spi)->name;
|
||||
indio_dev->info = &ad5770r_info;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
indio_dev->channels = ad5770r_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(ad5770r_channels);
|
||||
|
||||
ret = ad5770r_init(st);
|
||||
if (ret < 0) {
|
||||
dev_err(&spi->dev, "AD5770R init failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return devm_iio_device_register(&st->spi->dev, indio_dev);
|
||||
}
|
||||
|
||||
static const struct of_device_id ad5770r_of_id[] = {
|
||||
{ .compatible = "adi,ad5770r", },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ad5770r_of_id);
|
||||
|
||||
static const struct spi_device_id ad5770r_id[] = {
|
||||
{ "ad5770r", 0 },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, ad5770r_id);
|
||||
|
||||
static struct spi_driver ad5770r_driver = {
|
||||
.driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.of_match_table = ad5770r_of_id,
|
||||
},
|
||||
.probe = ad5770r_probe,
|
||||
.id_table = ad5770r_id,
|
||||
};
|
||||
|
||||
module_spi_driver(ad5770r_driver);
|
||||
|
||||
MODULE_AUTHOR("Mircea Caprioru <mircea.caprioru@analog.com>");
|
||||
MODULE_DESCRIPTION("Analog Devices AD5770R IDAC");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue
Block a user