drm/i915: Don't pass crtc to intel_get_shared_dpll() and .get_dpll()
Passing both crtc and its state is redundant. Pass just the state. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-2-ville.syrjala@linux.intel.com Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
This commit is contained in:
@ -9007,7 +9007,7 @@ static int ironlake_crtc_compute_clock(struct intel_crtc *crtc,
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ironlake_compute_dpll(crtc, crtc_state, NULL);
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ironlake_compute_dpll(crtc, crtc_state, NULL);
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if (!intel_get_shared_dpll(crtc, crtc_state, NULL)) {
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if (!intel_get_shared_dpll(crtc_state, NULL)) {
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DRM_DEBUG_KMS("failed to find PLL for pipe %c\n",
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DRM_DEBUG_KMS("failed to find PLL for pipe %c\n",
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pipe_name(crtc->pipe));
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pipe_name(crtc->pipe));
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return -EINVAL;
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return -EINVAL;
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@ -9608,7 +9608,7 @@ static int haswell_crtc_compute_clock(struct intel_crtc *crtc,
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struct intel_encoder *encoder =
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struct intel_encoder *encoder =
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intel_get_crtc_new_encoder(state, crtc_state);
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intel_get_crtc_new_encoder(state, crtc_state);
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if (!intel_get_shared_dpll(crtc, crtc_state, encoder)) {
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if (!intel_get_shared_dpll(crtc_state, encoder)) {
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DRM_DEBUG_KMS("failed to find PLL for pipe %c\n",
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DRM_DEBUG_KMS("failed to find PLL for pipe %c\n",
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pipe_name(crtc->pipe));
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pipe_name(crtc->pipe));
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return -EINVAL;
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return -EINVAL;
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@ -420,9 +420,10 @@ static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv,
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}
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}
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static struct intel_shared_dpll *
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static struct intel_shared_dpll *
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ibx_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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ibx_get_dpll(struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder)
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struct intel_encoder *encoder)
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{
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_shared_dpll *pll;
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struct intel_shared_dpll *pll;
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enum intel_dpll_id i;
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enum intel_dpll_id i;
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@ -764,15 +765,13 @@ hsw_ddi_calculate_wrpll(int clock /* in Hz */,
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*r2_out = best.r2;
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*r2_out = best.r2;
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}
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}
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static struct intel_shared_dpll *hsw_ddi_hdmi_get_dpll(int clock,
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static struct intel_shared_dpll *hsw_ddi_hdmi_get_dpll(struct intel_crtc_state *crtc_state)
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struct intel_crtc *crtc,
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struct intel_crtc_state *crtc_state)
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{
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{
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struct intel_shared_dpll *pll;
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struct intel_shared_dpll *pll;
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u32 val;
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u32 val;
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unsigned int p, n2, r2;
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unsigned int p, n2, r2;
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hsw_ddi_calculate_wrpll(clock * 1000, &r2, &n2, &p);
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hsw_ddi_calculate_wrpll(crtc_state->port_clock * 1000, &r2, &n2, &p);
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val = WRPLL_PLL_ENABLE | WRPLL_PLL_LCPLL |
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val = WRPLL_PLL_ENABLE | WRPLL_PLL_LCPLL |
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WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) |
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WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) |
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@ -790,11 +789,12 @@ static struct intel_shared_dpll *hsw_ddi_hdmi_get_dpll(int clock,
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}
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}
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static struct intel_shared_dpll *
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static struct intel_shared_dpll *
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hsw_ddi_dp_get_dpll(struct intel_encoder *encoder, int clock)
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hsw_ddi_dp_get_dpll(struct intel_crtc_state *crtc_state)
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{
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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struct intel_shared_dpll *pll;
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struct intel_shared_dpll *pll;
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enum intel_dpll_id pll_id;
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enum intel_dpll_id pll_id;
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int clock = crtc_state->port_clock;
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switch (clock / 2) {
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switch (clock / 2) {
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case 81000:
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case 81000:
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@ -820,19 +820,18 @@ hsw_ddi_dp_get_dpll(struct intel_encoder *encoder, int clock)
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}
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}
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static struct intel_shared_dpll *
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static struct intel_shared_dpll *
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hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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hsw_get_dpll(struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder)
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struct intel_encoder *encoder)
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{
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{
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struct intel_shared_dpll *pll;
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struct intel_shared_dpll *pll;
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int clock = crtc_state->port_clock;
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memset(&crtc_state->dpll_hw_state, 0,
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memset(&crtc_state->dpll_hw_state, 0,
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sizeof(crtc_state->dpll_hw_state));
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sizeof(crtc_state->dpll_hw_state));
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if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
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if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
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pll = hsw_ddi_hdmi_get_dpll(clock, crtc, crtc_state);
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pll = hsw_ddi_hdmi_get_dpll(crtc_state);
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} else if (intel_crtc_has_dp_encoder(crtc_state)) {
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} else if (intel_crtc_has_dp_encoder(crtc_state)) {
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pll = hsw_ddi_dp_get_dpll(encoder, clock);
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pll = hsw_ddi_dp_get_dpll(crtc_state);
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} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) {
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} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) {
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if (WARN_ON(crtc_state->port_clock / 2 != 135000))
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if (WARN_ON(crtc_state->port_clock / 2 != 135000))
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return NULL;
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return NULL;
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@ -1383,9 +1382,10 @@ skl_ddi_dp_set_dpll_hw_state(int clock,
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}
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}
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static struct intel_shared_dpll *
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static struct intel_shared_dpll *
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skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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skl_get_dpll(struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder)
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struct intel_encoder *encoder)
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{
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct intel_shared_dpll *pll;
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struct intel_shared_dpll *pll;
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int clock = crtc_state->port_clock;
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int clock = crtc_state->port_clock;
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bool bret;
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bool bret;
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@ -1827,10 +1827,10 @@ bxt_ddi_hdmi_set_dpll_hw_state(struct intel_crtc *intel_crtc,
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}
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}
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static struct intel_shared_dpll *
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static struct intel_shared_dpll *
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bxt_get_dpll(struct intel_crtc *crtc,
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bxt_get_dpll(struct intel_crtc_state *crtc_state,
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struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder)
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struct intel_encoder *encoder)
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{
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct intel_dpll_hw_state dpll_hw_state = { };
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struct intel_dpll_hw_state dpll_hw_state = { };
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_shared_dpll *pll;
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struct intel_shared_dpll *pll;
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@ -1911,8 +1911,7 @@ static void intel_ddi_pll_init(struct drm_device *dev)
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struct intel_dpll_mgr {
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struct intel_dpll_mgr {
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const struct dpll_info *dpll_info;
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const struct dpll_info *dpll_info;
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struct intel_shared_dpll *(*get_dpll)(struct intel_crtc *crtc,
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struct intel_shared_dpll *(*get_dpll)(struct intel_crtc_state *crtc_state,
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struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder);
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struct intel_encoder *encoder);
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void (*dump_hw_state)(struct drm_i915_private *dev_priv,
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void (*dump_hw_state)(struct drm_i915_private *dev_priv,
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@ -2361,9 +2360,10 @@ cnl_ddi_dp_set_dpll_hw_state(int clock,
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}
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}
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static struct intel_shared_dpll *
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static struct intel_shared_dpll *
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cnl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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cnl_get_dpll(struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder)
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struct intel_encoder *encoder)
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{
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct intel_shared_dpll *pll;
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struct intel_shared_dpll *pll;
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int clock = crtc_state->port_clock;
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int clock = crtc_state->port_clock;
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bool bret;
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bool bret;
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@ -2887,10 +2887,10 @@ static bool icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,
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}
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}
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static struct intel_shared_dpll *
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static struct intel_shared_dpll *
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icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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icl_get_dpll(struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder)
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struct intel_encoder *encoder)
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{
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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struct intel_digital_port *intel_dig_port;
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struct intel_digital_port *intel_dig_port;
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struct intel_shared_dpll *pll;
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struct intel_shared_dpll *pll;
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struct intel_dpll_hw_state pll_state = {};
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struct intel_dpll_hw_state pll_state = {};
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@ -3377,31 +3377,29 @@ void intel_shared_dpll_init(struct drm_device *dev)
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/**
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/**
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* intel_get_shared_dpll - get a shared DPLL for CRTC and encoder combination
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* intel_get_shared_dpll - get a shared DPLL for CRTC and encoder combination
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* @crtc: CRTC
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* @crtc_state: atomic state for the crtc
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* @crtc_state: atomic state for @crtc
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* @encoder: encoder
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* @encoder: encoder
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*
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*
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* Find an appropriate DPLL for the given CRTC and encoder combination. A
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* Find an appropriate DPLL for the given CRTC and encoder combination. A
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* reference from the @crtc to the returned pll is registered in the atomic
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* reference from the @crtc_state to the returned pll is registered in the
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* state. That configuration is made effective by calling
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* atomic state. That configuration is made effective by calling
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* intel_shared_dpll_swap_state(). The reference should be released by calling
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* intel_shared_dpll_swap_state(). The reference should be released by calling
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* intel_release_shared_dpll().
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* intel_release_shared_dpll().
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*
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*
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* Returns:
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* Returns:
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* A shared DPLL to be used by @crtc and @encoder with the given @crtc_state.
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* A shared DPLL to be used by @crtc_state and @encoder.
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*/
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*/
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struct intel_shared_dpll *
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struct intel_shared_dpll *
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intel_get_shared_dpll(struct intel_crtc *crtc,
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intel_get_shared_dpll(struct intel_crtc_state *crtc_state,
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struct intel_crtc_state *crtc_state,
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struct intel_encoder *encoder)
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struct intel_encoder *encoder)
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{
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{
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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const struct intel_dpll_mgr *dpll_mgr = dev_priv->dpll_mgr;
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const struct intel_dpll_mgr *dpll_mgr = dev_priv->dpll_mgr;
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if (WARN_ON(!dpll_mgr))
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if (WARN_ON(!dpll_mgr))
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return NULL;
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return NULL;
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return dpll_mgr->get_dpll(crtc, crtc_state, encoder);
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return dpll_mgr->get_dpll(crtc_state, encoder);
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}
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}
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/**
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/**
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@ -327,8 +327,7 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
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bool state);
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bool state);
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#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
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#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
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#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
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#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
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struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
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struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc_state *state,
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struct intel_crtc_state *state,
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struct intel_encoder *encoder);
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struct intel_encoder *encoder);
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void intel_release_shared_dpll(struct intel_shared_dpll *dpll,
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void intel_release_shared_dpll(struct intel_shared_dpll *dpll,
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struct intel_crtc *crtc,
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struct intel_crtc *crtc,
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