arm64: dts: qcom: sm8350: Add cpufreq node
Add cpufreq node and reference it for the CPUs. Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210216111703.1838663-1-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -44,6 +44,7 @@
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&L2_0>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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L2_0: l2-cache {
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compatible = "cache";
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next-level-cache = <&L3_0>;
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@ -59,6 +60,7 @@
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reg = <0x0 0x100>;
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enable-method = "psci";
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next-level-cache = <&L2_100>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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L2_100: l2-cache {
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compatible = "cache";
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next-level-cache = <&L3_0>;
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@ -71,6 +73,7 @@
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reg = <0x0 0x200>;
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enable-method = "psci";
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next-level-cache = <&L2_200>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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L2_200: l2-cache {
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compatible = "cache";
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next-level-cache = <&L3_0>;
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@ -83,6 +86,7 @@
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reg = <0x0 0x300>;
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enable-method = "psci";
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next-level-cache = <&L2_300>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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L2_300: l2-cache {
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compatible = "cache";
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next-level-cache = <&L3_0>;
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@ -95,6 +99,7 @@
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reg = <0x0 0x400>;
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enable-method = "psci";
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next-level-cache = <&L2_400>;
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qcom,freq-domain = <&cpufreq_hw 1>;
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L2_400: l2-cache {
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compatible = "cache";
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next-level-cache = <&L3_0>;
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@ -107,6 +112,7 @@
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reg = <0x0 0x500>;
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enable-method = "psci";
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next-level-cache = <&L2_500>;
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qcom,freq-domain = <&cpufreq_hw 1>;
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L2_500: l2-cache {
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compatible = "cache";
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next-level-cache = <&L3_0>;
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@ -120,6 +126,7 @@
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reg = <0x0 0x600>;
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enable-method = "psci";
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next-level-cache = <&L2_600>;
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qcom,freq-domain = <&cpufreq_hw 1>;
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L2_600: l2-cache {
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compatible = "cache";
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next-level-cache = <&L3_0>;
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@ -132,6 +139,7 @@
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reg = <0x0 0x700>;
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enable-method = "psci";
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next-level-cache = <&L2_700>;
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qcom,freq-domain = <&cpufreq_hw 2>;
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L2_700: l2-cache {
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compatible = "cache";
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next-level-cache = <&L3_0>;
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@ -788,6 +796,19 @@
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};
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};
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cpufreq_hw: cpufreq@18591000 {
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compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss";
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reg = <0 0x18591000 0 0x1000>,
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<0 0x18592000 0 0x1000>,
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<0 0x18593000 0 0x1000>;
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reg-names = "freq-domain0", "freq-domain1", "freq-domain2";
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
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clock-names = "xo", "alternate";
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#freq-domain-cells = <1>;
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};
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ufs_mem_hc: ufshc@1d84000 {
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compatible = "qcom,sm8350-ufshc", "qcom,ufshc",
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"jedec,ufs-2.0";
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