ASoC: omap-mcbsp: Single function CLKR/FSR source mux configuration
Use single function for the CLKR/FSR mux configuration. OMAP2/3 has 6 pin configuration on McBSP1 instance, while on OMAP4 McBSP4 instance have the 6 pin configuration so the omap2_mcbsp1_mux_* is not correct name for all support OMAP versions Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@ti.com>
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@ -687,40 +687,36 @@ int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id)
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return -EINVAL;
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}
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void omap2_mcbsp1_mux_clkr_src(struct omap_mcbsp *mcbsp, u8 mux)
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int omap_mcbsp_6pin_src_mux(struct omap_mcbsp *mcbsp, u8 mux)
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{
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const char *src;
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const char *signal, *src;
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int ret = 0;
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if (mcbsp->id != 1)
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return;
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if (mux == CLKR_SRC_CLKR)
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switch (mux) {
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case CLKR_SRC_CLKR:
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signal = "clkr";
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src = "clkr";
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else if (mux == CLKR_SRC_CLKX)
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break;
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case CLKR_SRC_CLKX:
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signal = "clkr";
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src = "clkx";
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else
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return;
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if (mcbsp->pdata->mux_signal)
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mcbsp->pdata->mux_signal(mcbsp->dev, "clkr", src);
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}
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void omap2_mcbsp1_mux_fsr_src(struct omap_mcbsp *mcbsp, u8 mux)
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{
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const char *src;
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if (mcbsp->id != 1)
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return;
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if (mux == FSR_SRC_FSR)
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break;
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case FSR_SRC_FSR:
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signal = "fsr";
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src = "fsr";
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else if (mux == FSR_SRC_FSX)
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break;
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case FSR_SRC_FSX:
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signal = "fsr";
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src = "fsx";
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else
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return;
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break;
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default:
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return -EINVAL;
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}
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if (mcbsp->pdata->mux_signal)
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mcbsp->pdata->mux_signal(mcbsp->dev, "fsr", src);
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ret = mcbsp->pdata->mux_signal(mcbsp->dev, signal, src);
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return ret;
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}
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#define max_thres(m) (mcbsp->pdata->buffer_size)
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@ -230,13 +230,11 @@ enum {
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#define XRDYEN BIT(10)
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#define XEMPTYEOFEN BIT(14)
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/* CLKR signal muxing options */
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#define CLKR_SRC_CLKR 0
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#define CLKR_SRC_CLKX 1
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/* FSR signal muxing options */
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#define FSR_SRC_FSR 0
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#define FSR_SRC_FSX 1
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/* Clock signal muxing options */
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#define CLKR_SRC_CLKR 0 /* CLKR signal is from the CLKR pin */
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#define CLKR_SRC_CLKX 1 /* CLKR signal is from the CLKX pin */
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#define FSR_SRC_FSR 2 /* FSR signal is from the FSR pin */
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#define FSR_SRC_FSX 3 /* FSR signal is from the FSX pin */
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/* McBSP functional clock sources */
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#define MCBSP_CLKS_PRCM_SRC 0
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@ -333,8 +331,7 @@ void omap_mcbsp_stop(struct omap_mcbsp *mcbsp, int tx, int rx);
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int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id);
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/* McBSP signal muxing API */
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void omap2_mcbsp1_mux_clkr_src(struct omap_mcbsp *mcbsp, u8 mux);
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void omap2_mcbsp1_mux_fsr_src(struct omap_mcbsp *mcbsp, u8 mux);
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int omap_mcbsp_6pin_src_mux(struct omap_mcbsp *mcbsp, u8 mux);
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/* Sidetone specific API */
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int omap_st_set_chgain(struct omap_mcbsp *mcbsp, int channel, s16 chgain);
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@ -554,22 +554,22 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
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case OMAP_MCBSP_CLKR_SRC_CLKR:
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if (cpu_class_is_omap1())
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break;
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omap2_mcbsp1_mux_clkr_src(mcbsp, CLKR_SRC_CLKR);
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err = omap_mcbsp_6pin_src_mux(mcbsp, CLKR_SRC_CLKR);
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break;
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case OMAP_MCBSP_CLKR_SRC_CLKX:
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if (cpu_class_is_omap1())
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break;
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omap2_mcbsp1_mux_clkr_src(mcbsp, CLKR_SRC_CLKX);
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err = omap_mcbsp_6pin_src_mux(mcbsp, CLKR_SRC_CLKX);
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break;
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case OMAP_MCBSP_FSR_SRC_FSR:
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if (cpu_class_is_omap1())
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break;
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omap2_mcbsp1_mux_fsr_src(mcbsp, FSR_SRC_FSR);
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err = omap_mcbsp_6pin_src_mux(mcbsp, FSR_SRC_FSR);
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break;
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case OMAP_MCBSP_FSR_SRC_FSX:
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if (cpu_class_is_omap1())
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break;
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omap2_mcbsp1_mux_fsr_src(mcbsp, FSR_SRC_FSX);
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err = omap_mcbsp_6pin_src_mux(mcbsp, FSR_SRC_FSX);
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break;
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default:
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err = -ENODEV;
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