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arm64: dts: qcom: qcs404: align CDSP PAS node with bindings

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The QCS404 CDSP remote processor can be brought to life using two
different bindings:
1. qcom,qcs404-cdsp-pas - currently used in DTSI.
2. qcom,qcs404-cdsp-pil.

Comment out the properties related to qcom,qcs404-cdsp-pil
(qcom,halt-regs, resets and additional clocks), to silence DT schema
warnings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221124184333.133911-3-krzysztof.kozlowski@linaro.org
This commit is contained in:
Krzysztof Kozlowski 2022-11-24 19:43:20 +01:00 committed by Bjorn Andersson
parent 863dd1913b
commit cd48d99bb7
1 changed files with 24 additions and 20 deletions
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44
arch/arm64/boot/dts/qcom/qcs404.dtsi
View File

@ -487,27 +487,31 @@
interrupt-names = "wdog", "fatal", "ready",
"handover", "stop-ack";
clocks = <&xo_board>,
<&gcc GCC_CDSP_CFG_AHB_CLK>,
<&gcc GCC_CDSP_TBU_CLK>,
<&gcc GCC_BIMC_CDSP_CLK>,
<&turingcc TURING_WRAPPER_AON_CLK>,
<&turingcc TURING_Q6SS_AHBS_AON_CLK>,
<&turingcc TURING_Q6SS_AHBM_AON_CLK>,
<&turingcc TURING_Q6SS_Q6_AXIM_CLK>;
clock-names = "xo",
"sway",
"tbu",
"bimc",
"ahb_aon",
"q6ss_slave",
"q6ss_master",
"q6_axim";
clocks = <&xo_board>;
clock-names = "xo";
resets = <&gcc GCC_CDSP_RESTART>;
reset-names = "restart";
qcom,halt-regs = <&tcsr 0x19004>;
/*
* If the node was using the PIL binding, then include properties:
* clocks = <&xo_board>,
* <&gcc GCC_CDSP_CFG_AHB_CLK>,
* <&gcc GCC_CDSP_TBU_CLK>,
* <&gcc GCC_BIMC_CDSP_CLK>,
* <&turingcc TURING_WRAPPER_AON_CLK>,
* <&turingcc TURING_Q6SS_AHBS_AON_CLK>,
* <&turingcc TURING_Q6SS_AHBM_AON_CLK>,
* <&turingcc TURING_Q6SS_Q6_AXIM_CLK>;
* clock-names = "xo",
* "sway",
* "tbu",
* "bimc",
* "ahb_aon",
* "q6ss_slave",
* "q6ss_master",
* "q6_axim";
* resets = <&gcc GCC_CDSP_RESTART>;
* reset-names = "restart";
* qcom,halt-regs = <&tcsr 0x19004>;
*/
memory-region = <&cdsp_fw_mem>;