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rtc: sirfsoc: set range

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This RTC is a 32bit counter running at 16Hz. This overflows every eight
years and a half. However, the driver uses the SW_VALUE register to store
the overflow, extending the counter to 64bit as long as the update happens
before the overflow.

Link: https://lore.kernel.org/r/20200305160452.27808-2-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Alexandre Belloni 2020-03-05 17:04:51 +01:00
parent 2911ee9e60
commit cd65dd4180
1 changed files with 1 additions and 0 deletions
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drivers/rtc/rtc-sirfsoc.c
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@ -346,6 +346,7 @@ static int sirfsoc_rtc_probe(struct platform_device *pdev)
return PTR_ERR(rtcdrv->rtc);
rtcdrv->rtc->ops = &sirfsoc_rtc_ops;
rtcdrv->rtc->range_max = (1ULL << 60) - 1;
rtcdrv->irq = platform_get_irq(pdev, 0);
err = devm_request_irq(&pdev->dev, rtcdrv->irq, sirfsoc_rtc_irq_handler,